Abov MC96FR364B, User Manual

Page: 83 / 194

November, 2018 Rev.1.4 83
T1DR B5
H
W FF
H
Timer 1 Data Register
PWM1PR B5
H
W FF
H
Timer 1 PWM Period Register
T1 B6
H
R 00
H
Timer 1 Register
PWM1DR B6
H
R/W 00
H
Timer 1 PWM Duty Register
CDR1 B6
H
R 00
H
Capture 1 Data Register
PWM1HR B7
H
W 00
H
Timer 1 PWM High Register
Table 11-6 Register Map of Timer 0, 1
11.4.1.8 Register Description
T0CR (Timer 0 Mode Control Register) B2
H
7 6 5 4 3 2 1 0
T0EN T0_PE CAP0 T0CK2 T0CK1 T0CK0 T0CN T0ST
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value : 00
H
T0EN Enables or disables Timer 0 module.
0
Disable Timer 0
1 Enable Timer 0
T0_PE
Controls whether to output Timer 0 output or not through I/O pin.
0
Timer 0 output does not come out through I/O pin
1 Timer 0 output overrides the normal port functionality of I/O pin
CAP0 Selects operating mode of Timer 0.
0
Timer/Counter mode
1 Capture mode
T0CK[2:0]
Selects clock source of Timer 0.
NOTE
T0CK2 T0CK1 T0CK0 Timer 0 clock
0 0 0 f
SCLK
/2
0 0 1 f
SCLK
/2^2
0 1 0 f
SCLK
/2^4
0 1 1 f
SCLK
/2^6
1 0 0 f
SCLK
/2^8
1 0 1 f
SCLK
/2^10
1 1 0 f
SCLK
/2^12
1 1 1 External Clock (EC0)
T0CN Decides whether to pause or continue counting
0
Pause counting temporarily
1 Continue to count
T0ST Decides whether to start or stop counter
0
Stops counting
1 Clear counter and starts up-counting
NOTE f
SCLK
is the frequency of internal operating clock, SCLK.
T0 (Timer 0 Register, Read Case) B3
H
7 6 5 4 3 2 1 0
T07 T06 T05 T04 T03 T02 T01 T00