152
November, 2018 Rev.1.4
11.10.9 Register Map
Name
Address
Dir
Default
Description
I2CMR
9C
H
R/W
00
H
I
2
C Mode Control Register
I2CSR
9D
H
R
00
H
I
2
C Status Register
I2CSCLLR
9E
H
R/W
3F
H
SCL Low Period Register
I2CSCLHR
9F
H
R/W
3F
H
SCL High Period Register
I2CSDAHR
A3
H
R/W
01
H
SDA Hold Time Register
I2CDR
A5
H
R/W
FF
H
I
2
C Data Register
I2CSAR
A6
H
R/W
00
H
I
2
C Slave Address Register
I2CSAR1
A7
H
R/W
00
H
I
2
C Slave Address Register 1
Table 11-19 Register map of I2C
SLA+W
ACK
DATA
LOST&
S or Sr
Y
N
0x45
ACK
STOP
Y
N
0x44
P
0x20
IDLE
IDLE
Y
GCALL
0x1D
0x95
0x15
From master to slave /
Master command or Data Write
From slave to master
0xxx
Value of Status Register
ACK
Interrupt
, SCL line is held low
Interrupt
after stop command
P
Arbitration lost as master and
addressed as slave
LOST&
General Call Address
GCALL
Figure 11-54 Formats and States in the Slave Receiver Mode
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
