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November, 2018 Rev.1.4
10.10 Saving and Restoring General Purpose Registers
10.11 Interrupt Timing
The interrupt request is sampled at the last cycle of the command currently being executed. On
recognition of interrupt request, the interrupt controller hands over the corresponding lower 8-bit
CLP2
CLP1
C2P1
C1P1
C2P2
C1P2
CLP2
Interrupt sampled here
8-bit interrupt Vector
INT_SRC
INTR_ACK
LAST_CYC
INTR_LCALL
INT_VEC
PROGA
SCLK
{8’h00, INT_VEC}
NOTE
Main Task
Saving
Register
Restoring
Register
Interrupt
Service Task
INTxx : PUSH PSW
PUSH DPL
PUSH DPH
PUSH B
PUSH ACC
∙
∙
Interrupt_Processing:
∙
∙
POP ACC
POP B
POP DPH
POP DPL
POP PSW
RETI
Figure 10-9 Timing chart for Interrupt Accept and Branch Address Generation
Figure 10-8 Processing General registers while an interrupt is serviced
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
