84
November, 2018 Rev.1.4
R
R
R
R
R
R
R
R
Initial value : 00
H
T0[7:0]
T0 Counter value
T0DR (Timer 0 Data Register, Write Case)
B3
H
7
6
5
4
3
2
1
0
T0D7
T0D6
T0D5
T0D4
T0D3
T0D2
T0D1
T0D0
W
W
W
W
W
W
W
W
Initial value : FF
H
T0D[7:0]
T0 Compare data
CDR0 (Capture 0 Data Register, Read Case)
B3
H
7
6
5
4
3
2
1
0
CDR07
CDR06
CDR05
CDR04
CDR03
CDR02
CDR01
CDR00
R
R
R
R
R
R
R
R
Initial value : 00
H
CDR0[7:0]
T0 Capture value
T1CR (Timer 1 Mode Count Register)
B4
H
7
6
5
4
3
2
1
0
POL
16BIT
PWM1E
CAP1
T1CK1
T1CK0
T1CN
T1ST
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : 00
H
POL
Selects polarity of PWM
0
PWM waveform is low for duty value
1
PWM waveform is high for duty value
16BIT
Selects width of Timer 0,1
0
Timer 0,1 are two separate 8-bit timers
1
Timer 0+1 is combined single 16-bit timer
PWM1E
Enable PWM function of Timer 1
0
Timer 1 is Normal Timer/Counter
1
Timer 1 is PWM
CAP1
Selects operating mode of Timer 1.
0
Timer/Counter mode
1
Capture mode
T1CK[1:0]
Selects the clock source of Timer 1.
T1CK1
T1CK0
Timer 1 clock
0
0
f
SCLK
0
1
f
SCLK
/2
1
0
f
SCLK
/2^4
1
1
Timer 0 Clock
T1CN
Decides whether to pause or continue counting
0
Pause counting temporarily
1
Continue to count
T1ST
Decides whether to start or stop counter
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
