November, 2018 Rev.1.4
113
CEN
Carrier Frequency Enable. This bit enables CRC counter.
0
Carrier Frequency is not generated.
1
Carrier Frequency is generated and goes out through the
REMOUT port with RODR value and-ed.
NOTE
f
SCLK
is the frequency of system clock, SCLK.
RMR2 (Remocon Mode Register 2)
2F56
H
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
CME
-
-
-
-
-
-
-
R/W
Initial value : 00
H
CME
Carrier Mask Enable
0
Carrier is not masked.
1
Carrier is masked.
CFRH (Carrier Frequency Register High)
BB
H
7
6
5
4
3
2
1
0
CFH7
CFH6
CFH5
CFH4
CFH3
CFH2
CFH1
CFH0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FF
H
CFH[7:0]
Carrier Frequency High
Carrier High Interval = CFH[7:0] X T
CR_CLK
T
CR_CLK
is the period of clock source for CRC counter selected by
CCK[1:0].
CFRL (Carrier Frequency Register Low)
BC
H
7
6
5
4
3
2
1
0
CFL7
CFL6
CFL5
CFL4
CFL3
CFL2
CFL1
CFL0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FF
H
CFL[7:0]
Carrier Frequency Low
Carrier Low Interval = CFL[7:0] X T
CR_CLK
T
CR_CLK
is the period of clock source for CRC counter selected by
CCK[1:0].
RDBH (Remocon Data Buffer High)
C2
H
7
6
5
4
3
2
1
0
RDB15
RDB14
RDB13
RDB12
RDB11
RDB10
RDB9
RDB8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value : FF
H
RDB[15:8]
Remote Data High Buffer (Lower byte of RDB)
RDBL (Remocon Data Buffer Low)
C3
H
7
6
5
4
3
2
1
0
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
