MC96FR364B
November, 2018 Rev.1.4
19
5. PIN DESCRIPTION
PIN
Name
I/O
Function
@RESET Shared with
P00
I/O - 8-bit I/O port, P0.
- Can be set in input or output mode bitwise.
- Internal pull-up resistor can be activated by
setting PxnPU bit in PxPU register when this
port is used as input port.
- Can be configured as an open drain output
mode by setting PxnOD bit in PxOD register.
Input
KS0/T0
P01
KS1/T1/PWM1
P02
KS2/T2
P03
KS3/T3/PWM3
P04
KS4/EC0
P05
KS5
P06
KS6
P07
KS7
P10
I/O 8-bit I/O port, P1.
- Can be set in input or output mode bitwise.
- Internal pull-up resistor can be activated by
setting PxnPU bit in PxPU register when this
port is used as input port.
- Can be configured as an open drain output
mode by setting PxnOD bit in PxOD register.
Input
KS8/MOSI1
P11
KS9/MISO1
P12
KS10/INT0
NOTE0
P13
KS11/INT1
NOTE0
P14
KS12/SS1/
INT2
NOTE0
P15
KS13/XCK1/
INT3
NOTE0
P16
KS14/MOSI0
P17
KS15/MISO0
P20
I/O - 3-bit I/O port, P2.
- Can be set in input or output mode bitwise.
- Internal pull-up resistor can be activated by
setting PxnPU bit in PxPU register when this
port is used as input port.
- Can be configured as an open drain output
mode by setting PxnOD bit in PxOD register.
Input
RESETB
NOTE1
P21
INT2/DSCL/
SCL
NOTE2
P22
INT3/DSDA/
SDA
NOTE2
-
-
-
NOTE0
INT3,2,1,0 can be triggered on P2[2:1], P3[7:6] ports when appropriate bits in PSR0 register are set.
NOTE1
When P20 is used as a external reset pin(=RESETB) by the FUSE configuration, this pin is configured as
an input port with internal pull-up resistor on.
NOTE2
SDA and SCL ports can be switched to P3[7:6] ports when appropriate bits in PSR0 register are set.
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...