November, 2018 Rev.1.4
99
CDR3H (Capture Data Register 3 High, Read Case)
CC
H
7
6
5
4
3
2
1
0
CDR3H7
CDR3H6
CDR3H5
CDR3H4
CDR3H3
CDR3H2
CDR3H1
CDR3H0
R
R
R
R
R
R
R
R
Initial value : 00
H
CDR3H[7:0]
T3 Capture Data High
PWM3DRH (PWM3 Duty Register High, Write Case)
CC
H
7
6
5
4
3
2
1
0
T3PDH7
T3PDH6
T3PDH5
T3PDH4
T3PDH3
T3PDH2
T3PDH1
T3PDH0
W
W
W
W
W
W
W
W
Initial value : 00
H
T3PDH[7:0]
PWM3 Duty High
NOTE
Writing is effective only when PWM3E = 1 and T3ST = 0.
T3DRL (Timer 3 Data Register Low, Write Case)
CD
H
7
6
5
4
3
2
1
0
T3DRL7
T3DRL6
T3DRL5
T3DRL4
T3DRL3
T3DRL2
T3DRL1
T3DRL0
W
W
W
W
W
W
W
W
Initial value : FF
H
T3DRL[7:0]
T3 Compare Data Low
NOTE
Be sure to clear PWM3E in T3CR register before loading this
register.
PWM3PRL (PWM3 Period Register Low, Write Case)
CD
H
7
6
5
4
3
2
1
0
T3PPL7
T3PPL6
T3PPL5
T3PPL4
T3PPL3
T3PPL2
T3PPL1
T3PPL0
W
W
W
W
W
W
W
W
Initial value : FF
H
T3PPL[7:0]
PWM3 Period Low
NOTE
Writing is effective only when PWM3E = 1 and T3ST = 0.
T3DRH (Timer 3 Data Register High, Write Case)
CE
H
7
6
5
4
3
2
1
0
T3DRH7
T3DRH6
T3DRH5
T3DRH4
T3DRH3
T3DRH2
T3DRH1
T3DRH0
W
W
W
W
W
W
W
W
Initial value : FF
H
T3DRH[7:0]
T3 Compare Data High
NOTE
Be sure to clear PWM3E in T3CR register before loading this
register.
PWM3PRH (PWM3 Period Register High, Write Case)
CE
H
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
