Abov MC96FR364B, User Manual

Page: 80 / 194

80 November, 2018 Rev.1.4
11.4.1.5 16-bit Capture Mode
If two 8-bit timers are combined to operate as a single 16-bit timer, this new timer can be in 16-bit
Capture Mode. The operating mechanism is just like a 8-bit timer in capture mode except counter and
capture register is 16-bit wide which are concatenated T0+T1 and CDR0+CDR1. The 16-bit counter
T0+T1 is clocked by a clock source selected by T0CK[2:0] bits in T0CR register. And the T1CK1,
T1CK0 and 16BIT bits in T1CR register must be set to ‘1’ to operate correctly. The following figure
shows how the Timer 0, 1 operate in 16-bit Capture Mode.
11.4.1.6 PWM Mode (Timer 1)
Timer 1 supports simple PWM waveform generating function by setting PWM1E bit in T1CR register.
To output the PWM waveform through T1/PWM1 pin, the T1_PE bit in PWM1HR register is to be set.
The period and duty of PWM waveform are decided by PWM1PR(PWM Period Register),
PWM1DR(PWM Duty Register) and PWM1HR registers. Note the PWM resolution is 10-bit depth, the
period and duty is calculated by next equation.
PWM Period = [ PWM1HR[3:2], PWM1PR ] X Timer 1 Clock Period
PWM Duty = [ PWM1HR[1:0], PWM1DR ] X Timer 1 Clock Period
Figure 11-12 Block Diagram of Timer 0, 1 in 16-bit Capture Mode
÷4096
÷1024
÷256
P
r
e
s
c
a
l
e
r
MUX
÷2
÷4
÷16
÷64
EC0
SCLK
[B5
H
]
INT0IF
INT0
Interrup
t
16-bit Counter
16-bit Data Register
T0EN&T0CN
Clear
[B3
H
]
T0ST
T0CK[2:0]
3
INT0
EIEDGE[1:0]
T1(8-bit) T0(8-bit)
CDR1(8-bit) CDR0(8-bit)
[B6
H
]
[B3
H
]
T0EN T0_PE CAP0 T0CK2 T0CK1 T0CK0 T0CN T0ST
T1CR
T0CR
1 X 1 X X X X X
X
1 0 1 1 1
X X
ADDRESS : B2
H
INITIAL VALUE : 0000_0000
B
ADDRESS : B4
H
INITIAL VALUE : 0000_0000
B
POL1 16BIT PWM1E CAP1 T1CK1 T1CK0 T1CN T1ST