108
November, 2018 Rev.1.4
11.6.3 Register Map
Name
Address
Dir
Default
Description
IRCC0
DD
H
R/W
00
H
IR Capture Control Register 0
IRCC1
DE
H
R/W
00
H
IR Capture Control Register 1
IRCC2
DF
H
R/W
00
H
IR Capture Control Register 2
Table 11-11 Register Map of IR Capture Control module
11.6.4 Register Description
IRCC0 (IR Capture Control Register 0)
DD
H
7
6
5
4
3
2
1
0
IRAEN
SENOEN
-
-
REFSEL
RSEL2
RSEL1
RSEL0
R/W
R/W
-
-
R/W
R/W
R/W
R/W
Initial value : 00
H
IRAEN
Enable or disable IR AMP.
0
Disable IR AMP
1
Enable IR AMP
SENOEN
Control monitoring of output of IRAMP
0
SIGNAL/P32 is normal port
1
The output of IRAMP is monitored on SIGNLA/P32 port
when IRAEN is enabled
REFSEL
Select external reference voltage as a (-) input of IR AMP module.
0
Internally divided voltage becomes reference voltage
1
External input voltage becomes reference voltage
RSEL[2:0]
Select reference voltage when REFSEL is ‘0’.
0
0
0
V0 (1/16 VDDEXT)
0
0
1
V1 (2/16 VDDEXT)
0
1
0
V2 (3/16 VDDEXT)
0
1
1
V3 (4/16 VDDEXT)
1
0
0
V4 (12/16 VDDEXT)
1
0
1
V5 (13/16 VDDEXT)
1
1
0
V6 (14/16 VDDEXT)
1
1
1
V7 (15/16 VDDEXT)
X
X
X
IRAEN = 0; Disable (V0~V7=0V)
IRCC1 (IR Capture Register 1)
DE
H
7
6
5
4
3
2
1
0
IRCEN
IRIIF
IREDGE1
IREDGE0
-
IRPOL
SINGLE
PHASE
R/W
R
R/W
R/W
-
R/W
R/W
R/W
Initial value : 00
H
IRCEN
Control operation mode of WT, T2 and T3
0
IR capture mode is disabled, normal timer function
1
IR capture mode is enabled (WT, T2 and T3 modules are
under control of this bit)
IRIIF
Interrupt flag of IRI input. This flag is cleared by writing ‘0’ to this bit
field or interrupt is serviced.
Summary of Contents for MC96FR364B
Page 17: ...MC96FR364B November 2018 Rev 1 4 17 4 PACKAGE DIMENSION...
Page 18: ...MC96FR364B 18 November 2018 Rev 1 4 Figure 4 1 PKG DIMENSION 28 TSSOP...
Page 23: ...MC96FR364B November 2018 Rev 1 4 23 6 3 REMOUT Port Data PAD VDD Figure 6 3 REMOUT port...
Page 69: ...November 2018 Rev 1 4 69 Initial value 00H BIT 7 0 BIT counter value...
