Clock System Operation
97
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Clock System (CS) Module
•
LFXTOFF = 0. LFXT enabled in active mode (AM) through LPM4.
•
LFXT is selected as the source for RTC, RTC is enabled (RTCHOLD = 0), and LPMx.5 is entered.
NOTE:
If LFXT is disabled when entering into a low-power mode, it is not fully enabled and stable
upon exit from the low-power mode, because its enable time is much longer than the wake-
up time. If the application requires or desires to keep LFXT enabled during a low-power
mode, the LFXTOFF bit can be cleared before entering the low-power mode. This causes
LFXT to remain enabled.
3.2.3 HFXT Oscillator
The HFXT high-frequency oscillator can be used with standard crystals or resonators in the 4 MHz to
24 MHz range. The HFXTDRIVE bits select the drive capability of HFXT. HFXTDRIVE bits can be used to
provide optimal settings for a given crystal characteristic. HFXT sources HFXTCLK. The HFFREQ bits
must be set for the appropriate frequency range of operation as show in
in crystal or bypass
modes of operation.
Table 3-1. HFFREQ Settings
HFXT Frequency Range
HFFREQ[1:0]
0 to 4 MHz
00
> 4 MHz to 8 MHz
01
> 8 MHz to 16 MHz
10
> 16 MHz to 24 MHz
11
NOTE:
The HFXT HFFREQ bit settings are also used to control the Power Management Module
and must match the intended frequency of operation for proper functioning of the device as
listed in
. In addition, these bits should be configured properly before use of HFXT
in either crystal or bypass modes of operation.
The HFXT pins are shared with general-purpose I/O ports. At power up, the default operation is HFXT
crystal operation. However, HFXT remains disabled until the ports shared with HFXT are configured for
HFXT operation. The configuration of the shared I/O is determined by the PSEL bit associated with HFXIN
and the HFXTBYPASS bit. Setting the PSEL bit causes the HFXIN and HFXOUT ports to be configured
for HFXT operation. If HFXTBYPASS is also set, HFXT is configured for bypass mode of operation, and
the oscillator associated with HFXT is powered down. In bypass mode of operation, HFXIN can accept an
external square-wave clock input signal, and HFXOUT is configured as a general-purpose I/O. The PSEL
bit that is associated with HFXOUT is a don't care.
If the PSEL bit associated with HFXIN is cleared, both HFXIN and HFXOUT ports are configured as
general-purpose I/Os, and HFXT is disabled.
HFXT is enabled under any of the following conditions:
•
HFXT is a source for MCLK (SELMx = 5) and in active mode (AM) (CPUOFF = 0)
•
HFXT is a source for SMCLK (SELSx = 5) and in active mode (AM) through LPM1 (SMCLKOFF = 0)
•
HFXTOFF = 0. HFXT enabled in active mode (AM) through LPM4.
NOTE:
If HFXT is disabled when entering into a low-power mode, it is not fully enabled and stable
upon exit from the low-power mode, because its enable time is much longer than the wake-
up time. If the application requires or desires to keep HFXT enabled during a low-power
mode, the HFXTOFF bit can be cleared before entering the low-power mode. This causes
HFXT to remain enabled.