Register Bit Conventions
46
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Read This First
Abbreviation
Description
PM
Power mode
POR
Power-on reset
PUC
Power-up clear
RAM
Random access memory
SCG
System clock generator
SFR
Special function register
SMCLK
Subsystem master clock
SNMI
System NMI
SP
Stack pointer
SR
Status register
src
Source
TOS
Top of stack
UNMI
User NMI
WDT
Watchdog timer
z16
16-bit address space
Register Bit Conventions
Each register is shown with a key indicating the accessibility of the each individual bit and the initial
condition:
Register Bit Accessibility and Initial Condition
Key
Bit Accessibility
rw
Read/write
r
Read only
r0
Read as 0
r1
Read as 1
w
Write only
w0
Write as 0
w1
Write as 1
(w)
No register bit implemented; writing a 1 results in a pulse. The register bit always reads as 0.
h0
Cleared by hardware
h1
Set by hardware
-0,-1
Condition after PUC
-(0),-(1)
Condition after POR
-[0],-[1]
Condition after BOR
-{0},-{1}
Condition after brownout
Trademarks
MSP430, EnergyTrace are trademarks of Texas Instruments.
IAR Embedded Workbench is a trademark of IAR.