Trigger
Excitation
Pulses (0 to 127)
Stop
Pulses (0 to 15)
High, Low, or Hi-Z
[Pause]
[Pause]
[S-Pulse]
[E-Pulse]
High, Low, or Hi-Z
Trigger
Excitation
Pulses (0 to 127)
Stop
Pulses (0 to 15)
High, Low, or Hi-Z
[Pause]
[Pause]
[S-Pulse]
[E-Pulse]
High, Low, or Hi-Z
Programmable Pulse Generator (PPG or PPG_A) Block
499
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Sequencer for Acquisition, Programmable Pulse Generator, and Physical
Interface (SAPH, SAPH_A)
Figure 21-4. PPG Single Tone Generation With SAPHPGC.PPOL = 0
(Starts With High Polarity)
Figure 21-5. PPG Single Tone Generation With SAPHPGC.PPOL = 1
(Starts With Low Polarity)
21.2.3 Dual Tone Generation
The output pulses consists of fife different phases:
Pause
,
Extra_Excitation
,
Regular_Excitation
,
Stop
, and
Pause
again. A state machine in PPG_A controls the flow. Set SAPH_AXPGCTL.XMOD = 2 for dual tone
generation. When the PPG_A is triggered, it leaves the Pause phase, generates excitation pulses with a
frequency defined by SAPH_AXPGHPER/SAPH_AXPGLPER, then excitation pulses with a frequency
defined by SAPH_APGHPER/SAPH_APGLPER followed by stop pulses, then goes to Pause phase again
(see
and
). The stop pulses have a 180° phase shift compared to the regular
excitation pulses. The stop pulses have same frequency as the regular excitation pulses. The PPG
generates up to 127 extra excitation pulses, up to 127 regular excitation pulses and up to 15 stop pulses,
which are controlled by the SAPH_AXPGCTL.XPULS, SAPH_APGC.EPULS and SAPH_APGC.SPULS
bits, respectively. The pulse polarity is programmable in the SAPH_APGC.PPOL bit. The signal polarity of
Pause can be programmed to be logical high, logical low, or high impedance through the
SAPH_APGC.PLEV and SAPH_APGC.PHIZ bits.
The PPG_A can be triggered by writing 1 to the SAPH_APPGTRIG.PPGTRIG bit when
SAPH_APGCTL.TRSEL = 0 (register mode) or by the acquisition sequencer (ASQ) when
SAPH_APGCTL.TRSEL = 1 (auto mode). To avoid unintended pulse outputs, keep
SAPH_APGCTL.PPGEN = 0 while updating the PPG_A registers. After the PPG_A registers are updated,
write 1 to the SAPH_APGCTL.PPGEN bit before triggering the PPG_A. The SAPH_APGCTL.PPGEN bit
must be set before triggering the PPG_A. The output channel is determined by the
SAPH_APGCTL.PPGCHSEL bit when SAPH_APGCTL.PGSEL = 0 (register mode) or by the acquisition
sequencer (ASQ) when SAPH_APGCTL.PGSEL = 1 (auto mode). Another layer of output control is inside
the PHY, so both blocks must be configured properly (see
). The PPG_A automatically stops
when it completes generating the pulses. To stop generating pulses before completion, regardless of
operation mode, write 1 to SAPH_APGCTL.STOP. The PPG_A immediately stops generating pulses. The
SAPH_APGCTL.STOP bit is automatically cleared to zero.