RAMCTL Registers
334
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
RAM Controller (RAMCTL)
10.3 RAMCTL Registers
lists the memory-mapped registers for the RAMCTL. All register offset addresses not listed in
should be considered as reserved locations and the register contents should not be modified.
Table 10-1. RAMCTL Registers
Offset
Acronym
Register Name
Type
Reset
Section
0h
CTL0
RAM Controller Control 0
read-write
6900h
2h
CTL1
RAM Controller Control 1
read-write
0h