SDHS Registers
617
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Sigma-Delta High Speed (SDHS)
22.5.19 SDHSWINLOTH Register (Offset = 26h) [reset = 0h]
SDHSWINLOTH is shown in
and described in
Return to
SDHS Window Comparator Low Threshold Register.
When SDHSCTL3.TRGEN bit = 1 or SDHSCTL5.SDHS_LOCK bit = 1, this register is locked. In that case,
an attempt to update this registers will be ignored.
Figure 22-45. SDHSWINLOTH Register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WINLOTH
R/W-0h
Table 22-30. SDHSWINLOTH Register Field Descriptions
Bit
Field
Type
Reset
Description
15-0
WINLOTH
R/W
0h
SDHS Window Comparator Low Threshold Register.
The user always needs to ensure that the values in this register is in
the correct data format. When the conversion data is lower than the
value specified in this register, WINLO interrrupt flag is asserted. It
only works during SDHS conversion is on-going.
Note: Note: Once the condition is detected, it takes 4 system clock
4 sampling periods to update RIS.WINLO due to
synchonization requirement.
Reset type: PUC