TBCL0-1
TBCL0
0h
Timer Clock
Timer
Set TBxCTL TBIFG
Set TBxCCR0 CCIFG
1h
TBCL0-1
TBCL0
0h
0h
TBxR
(max)
TBxCL0
Timer_B Operation
668
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
Timer_B
26.2.3 Timer Mode Control
The timer has four modes of operation: stop, up, continuous, and up/down (see
). The
operating mode is selected with the MC bits.
Table 26-1. Timer Modes
MC
Mode
Description
00
Stop
The timer is halted.
01
Up
The timer repeatedly counts from zero to the value of compare register TBxCL0.
10
Continuous
The timer repeatedly counts from zero to the value selected by the CNTL bits.
11
Up/down
The timer repeatedly counts from zero up to the value of TBxCL0 and then back down to zero.
26.2.3.1 Up Mode
The up mode is used if the timer period must be different from TBxR
(max)
counts. The timer repeatedly
counts up to the value of compare latch TBxCL0, which defines the period (see
). The number
of timer counts in the period is 1. When the timer value equals TBxCL0, the timer restarts
counting from zero. If up mode is selected when the timer value is greater than TBxCL0, the timer
immediately restarts counting from zero.
Figure 26-2. Up Mode
The TBxCCR0 CCIFG interrupt flag is set when the timer
counts
to the TBxCL0 value. The TBIFG
interrupt flag is set when the timer
counts
from TBxCL0 to zero.
shows the flag set cycle.
Figure 26-3. Up Mode Flag Setting
26.2.3.1.1 Changing Period Register TBxCL0
When changing TBxCL0 while the timer is running and when the TBxCL0 load mode is
immediate
, if the
new period is greater than or equal to the old period or greater than the current count value, the timer
counts up to the new period. If the new period is less than the current count value, the timer rolls to zero.
However, one additional count may occur before the counter rolls to zero.