MSB
0
C
LSB
Instruction Set Description
237
SLAU367P – October 2012 – Revised April 2020
Copyright © 2012–2020, Texas Instruments Incorporated
CPUX
4.6.3.24 RLCX
* RLCX.A
Rotate left through carry address-word
* RLCX.[W]
Rotate left through carry word
* RLCX.B
Rotate left through carry byte
Syntax
RLCX.A dst
RLCX dst
or
RLCX.W dst
RLCX.B dst
Operation
C
←
MSB
←
MSB-1 .... LSB+1
←
LSB
←
C
Emulation
ADDCX.A dst,dst
ADDCX dst,dst
ADDCX.B dst,dst
Description
The destination operand is shifted left 1 position as shown in
. The carry bit
(C) is shifted into the LSB and the MSB is shifted into the carry bit (C).
Status Bits
N:
Set if result is negative, reset if positive
Z:
Set if result is zero, reset otherwise
C:
Loaded from the MSB
V:
.A: Set if an arithmetic overflow occurs: the initial value is 040000h
≤
dst <
0C0000h; reset otherwise
.W: Set if an arithmetic overflow occurs: the initial value is 04000h
≤
dst < 0C000h;
reset otherwise
.B: Set if an arithmetic overflow occurs: the initial value is 040h
≤
dst < 0C0h; reset
otherwise
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
The 20-bit value in R5 is shifted left 1 position.
RLCX.A
R5
; (R5 x 2) + C -> R5
Example
The RAM byte LEO is shifted left 1 position. PC is pointing to upper memory.
RLCX.B
LEO
; RAM(LEO) x 2 + C -> RAM(LEO)
Figure 4-46. Destination Operand-Carry Left Shift