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Registers
325 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.3.2 CIG Registers
Table 1-125 lists the memory-mapped registers for the CIG. All register offset addresses not listed in
Table 1-125 should be considered as reserved locations and the register contents should not be modified.
Table 1-125. CIG REGISTERS
Offset Acronym Register Name Section
0h CIG_reg0 CIG Mode Reg Section 1.3.2.1
4h CIG_reg1 CIG Display Config Reg Section 1.3.2.2
8h CIG_reg2 CIG HDMI Transparency Config Reg Section 1.3.2.3
Ch CIG_reg3 CIG HDMI Transparent Color Section 1.3.2.4
10h CIG_reg4 CIG HDCOMP Transparency Config Reg Section 1.3.2.5
14h CIG_reg5 CIG HDCOMP Transparent Color Section 1.3.2.6
18h CIG_reg6 CIG PIP Display Config Reg Section 1.3.2.7
1Ch CIG_reg7 CIG PIP Position Config Reg Section 1.3.2.8
20h CIG_reg8 CIG PIP Size Config Reg Section 1.3.2.9
24h CIG_reg9 CIG PIP Transparency Config Reg Section 1.3.2.10
28h CIG_reg10 CIG PIP Transparent Color Section 1.3.2.11