Internal Modules
122
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.2.6.2.8 WSS
The VENC can insert 14-bit video information (WSS) on line 23 of every frame to conform to the ITU-R
BT.1119-2 (ETSI EN 300 294) Wide Screen Signaling specification for the 625i system. The 14-bit
transmitted data is specified in the 20-bit WSS_DATA register. The WSS_EN register enables attribute
insertion.
shows the WSS_DATA register usage.
Figure 1-67. WSS_Data Register Usage
19
14
13
11
10
8
7
4
3
0
Unused
GROUP4
GROUP3
GROUP2
GROUP1
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Transmission order is LSB first, that is, WSS_DATA[0] is transmitted first then WSS_DATA[1] follows.
The amplitude of the WSS symbol is automatically determined as five-seventh (5/7) of white 100%. As
described earlier, the white level is calculated by the sync amplitude and picture-sync ratio registers
(CSLVL and CPSR for CVBS).
1.2.6.2.9 CGMS
The VENC can insert 14-bit CGMS data on line 20 and line 283 to conform to the EIAJ CPR-1024 for
525i. The 14-bit VID data and the corresponding 6-bit CRC are set in the 20-bit WSS_DATA register. The
CRC should be calculated by user based on the following equation.
G(x) = x
6
+ x + 1, where x
6
, x are preset to 1
The WSS_EN register enables attribute insertion.
shows the WSS_DATA register usage.
Figure 1-68. WSS_Data Register Usage
19
14
13
6
5
2
1
0
CRC
WORD2
WORD1
WORD0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Transmission order is LSB first, that is, WSS_DATA[0] is transmitted first and then WSS_DATA[1] follows.
WSS_DATA and WSS_EN registers are exclusively used for WSS and CGMS insertion depending on the
timing format.
The amplitude of CGMS data is automatically determined as 70% of white (70IRE).