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101 SPRUHI7A – December 2012 – Revised June 2016
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High-Definition Video Processing Subsystem (HDVPSS)
1.2.6.2.3.5 DAC Video Output Timing
1.2.6.2.3.5.1 SDTV Timing
Figure 1-50 shows horizontal timing characteristics of the SDTV DAC video output. The number of pixels
per line is determined by the TV scan format register FMT. The horizontal sync pulse width is also fixed
depending on the FMT setting. The color burst start/end positions are specified by BST_H_STA and
BST_H_STP registers, and the active video start/end positions are specified by AV_H_STA and
AV_H_STP registers. The timing reference of these registers is the internal TV counter.
The AV_H registers specify the window position for the active video. There are similar registers to specify
the AVID timing which controls the input video timing. They are independent.
Serration and equalization pulses are inserted on the appropriate lines defined in the standard. Color burst
is automatically inserted on the appropriate lines defined in the standard.
Figure 1-51 and Figure 1-52
show the vertical timing characteristics of NTSC and PAL. The vertical sync duration is selectable from
either 3H or 2.5H by the SVSW register. Typically, 3H VSYNC is used for 525i and 2.5H VSYNC is used
for 625i, but this is not always the case. For example, PAL-N has 3H VSYNC even though it is a 625i
system.
The color burst is not indicated in these figures but its sequence is managed by hardware. The PAL
meander sequence is supported for PAL mode.
Figure 1-50. SDTV Horizontal Timing
Table 1-33. SDTV Horizontal Timing Parameter
Parameter Item 525I (FMT = 0) 625I (FMT = 1) Unit
T1 Horizontal Sync Pulse
Width
127 clk2x
T2 H Ref to Burst Start BST_H_STA
T3 H Ref to Burst End BST_H_STP
T4 H ref to H Blanking End AV_H_STA
T5 H ref to H Blanking Start AV_H_STP
T6 1H HITV
T7 Equalizing Pulse Width 62 63
T8 Serration Pulse Width 127
T9 1/2H HITV/2