Internal Modules
239
SPRUHI7A – December 2012 – Revised June 2016
Copyright © 2012–2016, Texas Instruments Incorporated
High-Definition Video Processing Subsystem (HDVPSS)
1.2.13.3.1.1.4 1D
This bit is set if a large one dimensional frame needs to be sent to the client. In this case, the stride is
ignored and for the write the stride the generated descriptor will always be 0. If this bit is set, then the
transfer length and transfer height and frame width and frame height fields are combined to form one 32-
bit field with the upper 8 bits reserved and the lower 24 bits being the size of the frame in pixels.
CAUTION
Make sure the 1D bit is always cleared to 0 for expected functioning of the
VPDMA.
1.2.13.3.1.1.5 Even Line Skip
The Even Line skip is used with Line Stride to generate the next line address on an even line. All frames
start on line 0. This value allows for the DMA controller to skip lines for interlaced data in a progressive
frame buffer.
1.2.13.3.1.1.6 Odd Line Skip
The Odd Line skip is used with Line Stride to generate the next line address on an odd line. All frames
start on line 0, so this will apply starting with the second line. This value allows for the DMA controller to
skip lines for interlaced data in a progressive frame buffer.
1.2.13.3.1.1.7 Line Stride
Bits 15-0 are the stride between lines in bytes at the external address. This value is added or subtracted
based upon an adjustment using the current skip value. Operation of the external address pointer shall
load the Source Address upon start of the transfer, then at the end of each line increment or decrement by
the value computed using the Line Stride and Skip value for the line. The line stride must be aligned to an
128-bit bus width i.e The lower 4 bits of the line stride (in hexa decimal) should be zero.
1.2.13.3.1.2 Data Packet Descriptor Word 1
Table 1-74. Data Packet Descriptor Word 1 Field Description
Bits
Name
Description
31-16
Line Length
Line Length in Pixels
15-0
Transfer Height
Number of rows in transfer.
1.2.13.3.1.2.1 Line Length
Bits 31-16 are the line length in pixels of the current channel. This is ignored for the outbound transfer as
the client will provide the line length with the end of line signal on the client interface. The maximum
supported line length is currently 4096.
1.2.13.3.1.2.2 Transfer Height
Bits 15-0 are the number of lines to be transferred in the current channel. This is ignored for outbound
transfers as the client will provide the line length with the end of frame signal on the client interface. The
maximum supported transfer size is currently 2048.
