Virtex-4 QV FPGA Ceramic Packaging
53
UG496 (v1.1) June 8, 2012
CF1144 (FX60) Ceramic Flip-Chip Column Grid Package
R
7
IO_L25P_CC_SM7_LC_7
AH27
7
IO_L25N_CC_SM7_LC_7
AJ27
7
IO_L26P_SM6_7
AL25
7
IO_L26N_SM6_7
AM25
7
IO_L27P_SM5_7
AF26
7
IO_L27N_SM5_7
AG26
7
IO_L28P_7
AD24
7
IO_L28N_VREF_7
AE24
7
IO_L29P_SM4_7
AG25
7
IO_L29N_SM4_7
AH25
7
IO_L30P_SM3_7
AL26
7
IO_L30N_SM3_7
AM26
7
IO_L31P_SM2_7
AF25
7
IO_L31N_SM2_7
AF24
7
IO_L32P_SM1_7
AJ26
7
IO_L32N_SM1_7
AJ25
7
IO_L17P_7
AG28
7
IO_L17N_7
AG27
7
IO_L18P_7
AH23
7
IO_L18N_7
AG23
7
IO_L19P_7
AE28
7
IO_L19N_7
AF28
7
IO_L20P_7
AF23
7
IO_L20N_VREF_7
AE23
7
IO_L21P_7
AE27
7
IO_L21N_7
AE26
7
IO_L22P_7
AL24
7
IO_L22N_7
AK24
7
IO_L23P_VRN_7
AK27
7
IO_L23N_VRP_7
AK26
7
IO_L24P_CC_LC_7
AJ24
7
IO_L24N_CC_LC_7
AH24
7
IO_L1P_7
AK32
7
IO_L1N_7
AK31
7
IO_L2P_7
AL19
7
IO_L2N_7
AL18
7
IO_L3P_7
AM32
7
IO_L3N_7
AM31
Table 2-2:
CF1144 Package(FX60) (Cont’d)
Bank
Pin Description
Pin
Number
No Connects