110
Virtex-4 QV FPGA Ceramic Packaging
UG496 (v1.1) June 8, 2012
Chapter 2: Pinout Tables
R
N/A
GNDA_106
AV31
N/A
GNDA_106
AW32
N/A
GNDA_106
AV33
N/A
GNDA_106
AW35
N/A
GNDA_109
AV9
N/A
GNDA_109
AV11
N/A
GNDA_109
AV13
N/A
GNDA_109
AV14
N/A
GNDA_109
AW14
N/A
GNDA_109
AV17
N/A
GNDA_109
AV20
N/A
GNDA_110
AK1
N/A
GNDA_110
AV1
NC
N/A
GNDA_110
AL2
N/A
GNDA_110
AN2
N/A
GNDA_110
AR2
N/A
GNDA_110
AW2
NC
N/A
GNDA_110
AV5
N/A
GNDA_110
AW5
N/A
GNDA_110
AV7
N/A
GNDA_110
AW8
N/A
GNDA_111
W1
N/A
GNDA_111
Y2
N/A
GNDA_111
AB2
N/A
GNDA_111
AD2
N/A
GNDA_111
AG2
N/A
GNDA_111
AK2
N/A
GNDA_112
H2
N/A
GNDA_112
J2
N/A
GNDA_112
L2
N/A
GNDA_112
N2
N/A
GNDA_112
T2
N/A
GNDA_113
W2
N/A
GNDA_113
B1
NC
N/A
GNDA_113
E1
N/A
GNDA_113
H1
N/A
GNDA_113
A2
NC
N/A
GNDA_113
E2
Table 2-3:
FF1517 Package Pinout (FX140) (Cont’d)
Bank
Pin Description
Pin Number
No Connects