Virtex-4 QV FPGA Ceramic Packaging
129
UG496 (v1.1) June 8, 2012
CF1509 (LX200) Ceramic Flip-Chip Column Grid Package
R
6
IO_L28N_VREF_6
J9
6
IO_L29P_6
F16
6
IO_L29N_6
F15
6
IO_L30P_6
H9
6
IO_L30N_6
G8
6
IO_L31P_6
K11
6
IO_L31N_6
L11
6
IO_L32P_6
L10
6
IO_L32N_6
K9
7
IO_L25P_CC_SM7_LC_7
AP27
7
IO_L25N_CC_SM7_LC_7
AR27
7
IO_L26P_SM6_7
AV30
7
IO_L26N_SM6_7
AU30
7
IO_L27P_SM5_7
AR26
7
IO_L27N_SM5_7
AT26
7
IO_L28P_7
AW29
7
IO_L28N_VREF_7
AV29
7
IO_L29P_SM4_7
AV27
7
IO_L29N_SM4_7
AW27
7
IO_L30P_SM3_7
AT29
7
IO_L30N_SM3_7
AR29
7
IO_L31P_SM2_7
AU26
7
IO_L31N_SM2_7
AU27
7
IO_L32P_SM1_7
AT28
7
IO_L32N_SM1_7
AR28
7
IO_L17P_7
AL26
7
IO_L17N_7
AM27
7
IO_L18P_7
AU31
7
IO_L18N_7
AU32
7
IO_L19P_7
AV28
7
IO_L19N_7
AU28
7
IO_L20P_7
AW32
7
IO_L20N_VREF_7
AV32
7
IO_L21P_7
AW25
7
IO_L21N_7
AW26
7
IO_L22P_7
AP29
7
IO_L22N_7
AN29
Table 2-4:
CF1509 Package Pinout (LX200) (Cont’d)
Bank
Pin Description
Pin Number
No Connect