Xilinx Virtex-4 QV FPGA, Manual

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Virtex-4 QV FPGA Ceramic Packaging www.xilinx.com 117
UG496 (v1.1) June 8, 2012
CF1509 (FX140) Ceramic Flip-Chip Column Grid Package
R
N/A VCCAUX AL33
N/A VCCINT AB6
N/A VCCINT AF6
N/A VCCINT V8
N/A VCCINT L9
N/A VCCINT L11
N/A VCCINT AE11
N/A VCCINT AG11
N/A VCCINT M12
N/A VCCINT AD12
N/A VCCINT AF12
N/A VCCINT L13
N/A VCCINT N13
N/A VCCINT R13
N/A VCCINT U13
N/A VCCINT AE13
N/A VCCINT AG13
N/A VCCINT K14
N/A VCCINT M14
N/A VCCINT P14
N/A VCCINT T14
N/A VCCINT AD14
N/A VCCINT AF14
N/A VCCINT L15
N/A VCCINT N15
N/A VCCINT R15
N/A VCCINT AA15
N/A VCCINT AC15
N/A VCCINT AE15
N/A VCCINT AG15
N/A VCCINT AJ15
N/A VCCINT P16
N/A VCCINT T16
N/A VCCINT AD16
N/A VCCINT AF16
N/A VCCINT N17
N/A VCCINT R17
N/A VCCINT U17
Table 2-3: FF1517 Package Pinout (FX140) (Cont’d)
Bank Pin Description Pin Number No Connects