Virtex-4 QV FPGA Ceramic Packaging
107
UG496 (v1.1) June 8, 2012
CF1509 (FX140) Ceramic Flip-Chip Column Grid Package
R
N/A
MGTCLK_N_110
AW7
N/A
RTERM_110
AV6
N/A
MGTVREF_110
AV8
N/A
AVCCAUXRXA_111
AA2
N/A
RXPPADA_111
Y1
N/A
VTRXA_111
AB1
N/A
RXNPADA_111
AA1
N/A
AVCCAUXMGT_111
AH2
N/A
AVCCAUXTX_111
AE2
N/A
VTTXA_111
AC2
N/A
TXPPADA_111
AC1
N/A
TXNPADA_111
AD1
N/A
VTTXB_111
AF2
N/A
TXPPADB_111
AE1
N/A
TXNPADB_111
AF1
N/A
AVCCAUXRXB_111
AJ2
N/A
RXPPADB_111
AH1
N/A
VTRXB_111
AG1
N/A
RXNPADB_111
AJ1
N/A
AVCCAUXRXA_112
K2
N/A
RXPPADA_112
J1
N/A
VTRXA_112
L1
N/A
RXNPADA_112
K1
N/A
AVCCAUXMGT_112
U2
N/A
AVCCAUXTX_112
P2
N/A
VTTXA_112
M2
N/A
TXPPADA_112
M1
N/A
TXNPADA_112
N1
N/A
VTTXB_112
R2
N/A
TXPPADB_112
P1
N/A
TXNPADB_112
R1
N/A
AVCCAUXRXB_112
V2
N/A
RXPPADB_112
U1
N/A
VTRXB_112
T1
N/A
RXNPADB_112
V1
Table 2-3:
FF1517 Package Pinout (FX140) (Cont’d)
Bank
Pin Description
Pin Number
No Connects
