Enhanced PWM (ePWM) Module
Table 15-46. EPWM1 Initialization for
Register
Bit
Value
Comments
TBPRD
TBPRD
600 (258h)
Period = 1200 TBCLK counts
TBPHS
TBPHS
0
Clear Phase Register to 0
TBCTL
CTRMODE
TB_UPDOWN
PHSEN
TB_DISABLE
Phase loading disabled
PRDLD
TB_SHADOW
SYNCOSEL
TB_CTR_ZERO
Sync down-stream module
CMPCTL
SHDWAMODE
CC_SHADOW
SHDWBMODE
CC_SHADOW
LOADAMODE
CC_CTR_ZERO
Load on CTR = 0
LOADBMODE
CC_CTR_ZERO
Load on CTR = 0
AQCTLA
CAU
AQ_SET
Set actions for EPWM1A
CAD
AQ_CLEAR
AQCTLB
CBU
AQ_SET
Set actions for EPWM1B
CBD
AQ_CLEAR
Table 15-47. EPWM2 Initialization for
Register
Bit
Value
Comments
TBPRD
TBPRD
600 (258h)
Period = 1200 TBCLK counts
TBPHS
TBPHS
0
Clear Phase Register to 0
TBCTL
CTRMODE
TB_UPDOWN
PHSEN
TB_ENABLE
Phase loading enabled
PRDLD
TB_SHADOW
SYNCOSEL
TB_SYNC_IN
Sync flow-through
CMPCTL
SHDWAMODE
CC_SHADOW
SHDWBMODE
CC_SHADOW
LOADAMODE
CC_CTR_ZERO
Load on CTR = 0
LOADBMODE
CC_CTR_ZERO
Load on CTR = 0
AQCTLA
CAU
AQ_SET
Set actions for EPWM2A
CAD
AQ_CLEAR
AQCTLB
CBU
AQ_SET
Set actions for EPWM2B
CBD
AQ_CLEAR
Example 15-4. Code Snippet for Configuration in
// Run Time (Note: Example execution of one run-time instance)
//===========================================================
EPwm1Regs.CMPA.half.CMPA = 400;
// adjust duty for output EPWM1A
EPwm1Regs.CMPB = 200;
// adjust duty for output EPWM1B
EPwm2Regs.CMPA.half.CMPA = 500;
// adjust duty for output EPWM2A
EPwm2Regs.CMPB = 300;
// adjust duty for output EPWM2B
1564
Pulse-Width Modulation Subsystem (PWMSS)
SPRUH73H – October 2011 – Revised April 2013
Copyright © 2011–2013, Texas Instruments Incorporated