4.3 Using Power Fluctuation Testing (Simulation) Function
KP3000GS
91
phase opens.
The stop phase can be set at the Normal 1, Normal 2, and Abnormal steps. For other steps, the stop
phase is fixed to OFF and cannot be specified.
Trigger output (Trig Out)
State output to CONTROL I/O connector. This specifies whether the trigger output presents when
the step starts. Polarity and pulse width of the trigger output complies with the trigger output setting
(see
4.3.5
). At the Initial Step, the trigger output cannot be specified and thus no trigger is output.
Step sync code output (Code)
State output to CONTROL I/O connector. Code to output while the execution of the step, which is
specified by 2-bit H/L. The step synchronization code can be specified also at the Initial Step.
Repeat (Repeat)
You can set to repeat the simulation in a series from the Normal 1 step to the Normal 2 step. Specify
the ON or OFF of repeat and the repeat count. When Repeat is set to ON, the simulation repeats for
the specified count. The simulation in a series is repeated for the repeat count + 1. Setting the repeat
count to zero (0) means an infinite count. When Repeat is set to OFF, the KP3000GS executes the
simulation only once and finishes it without performing the repeat operation.
4.3.3 Output Examples Using Simulation Function
Voltage dip simulation
In this simulation, the 50 Hz 100 V power source repeats a 70 % voltage dip for 0.5 seconds three
times at 10-second intervals as shown in Figure 4–12. For this case, set so that the total of Normal 1
and Normal 2 Step Times becomes 10 seconds and set the repeat count to 3. Set the Trans 1 and
Trans 2 Step Times to zero (Table 4-6).
正常時
100 V
ディップ時
70 V
周波数
: 50 Hz
5
秒
0.5
秒
5
秒
3
回繰り返し
At dipping
At normal
Frequency: 50Hz
Repeat 3 times
5 second
5 second
0.5
second
Figure 4-12 Voltage Dip Simulation Example
Summary of Contents for KP3000GS
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