NF KP3000GS, Instruction Manual

Page: 264 / 279

10.26 External Control I/O
KP3000GS 245
10.26 External Control I/O
When you enabled the external control from the menu, you can control this product by using the
external signal (or non voltage contact). The state output is always on. The detection and state
switching is done at 10 ms-cycle. If the Remote state is achieved by the external interface, a
control input is ignored.
Item Description
Factory
default
Control
input External control input Enabled or Disabled
Input level TTL *38
Nondestructive maximum input
+10 V /

5 V
Input impedance
Pull-up to +5 V via 47 k

Control Output Off Falling Off
Output On Falling On
Sequence start/resume *39 Falling Start
Stop of sequence *39 Falling Stop
Sequence is in the Hold status Falling Hold
Sequence branch 1 Falling Branch start
Sequence branch 2 Falling Branch start
Memory recall (+ compile) *40 Falling Recall
Memory specification 1 Specify 0 to 3
(Equivalent to memory 1 to 4, respectively)
Memory specification 2
Clear the current peak-hold value
Falling Clear
State
output Output level TTL *41
Output impedance
220

Polarity *42 Polarity reverse Negative
Status Power On/Off Low: Off, High: On
Output On/Off* Low: On, High: Off (Negative)
Low: Off, High: On (Positive)
Protection operation* Low: Active, High: None (Negative)
Low: None, High: Active (Positive)
Limiter operation* Low: Active, High: None (Negative)
Low: None, High: Active (Positive)
AGC/Autocal setting state* Low: On, High: Off (Negative)
Low: Off, High: On (Positive)
Software busy* Low: Busy, High: Ready (Negative)
Low: Ready, High: Busy (Positive)
Output range Low: 200 V, High: 100 V
Sequence operation
Step sync 1
*39
High level or Low level
Sequence operation
Step sync 2
*39
Trigger Positive or negative
Termina
l D-sub 25-pin multi-connector (rear panel, female, M2.6 screw)
*38:
Low
: 0.8 V or lower, High: 2.6 V or higher, the chassis potential.
*39: Sequence start and stop of the control input are effective for the Simulation as well. Also, step
sync output 1 and 2 of the control output are effective for the Simulation as well.
*40: The memory recall input of the control input recalls the setting memory for the Normal
(Continuous), the Sequence Memory for the Sequence, and the Simulation Memory for the
Simulation. For the Sequence and Simulation, the compile data is also included.
*41: Low: 0.4 V or lower, High: 2.7 V or higher, the chassis potential.
*42: Polarity reverse (collective) is available only for the state with *.