MAX32600 User’s Guide
System Clock, Timers/Counters, Watchdog Timers and Real Time Clock
10.4 Timers/Counters
• This only affects the first pass in Gated Mode
• Counting always begins at 0x0000_0001 after the first timer reset
3. Write to the Timer Compare register,
, to set the Compare value
4. If desired, enable the timer interrupt,
5. Configure the associated GPIO port pin for the Timer Input function
6. If using the Timer Output function, configure the associated GPIO port pin for the Timer Output function. (See
GPIO Pins and Peripheral Mode Functions
for
further information.)
7. Enable the timer,
= "1"
8. Assert the Timer Input signal to initiate the counting
• High if
= “0”
• Low if
= “1”
10.4.2.8
Capture/Compare Mode
In Capture/Compare Mode, the timer begins counting after the first desired external Timer Input transition occurs. The selected transition (rising edge or falling edge)
is set by the
bit in the Timer Control Register. The timer input is the currently selected System Clock. Every subsequent transition, after the first
transition, captures the current count value. The Captured timer value is written to the Timer PWM register,
. When the Capture event occurs,
an interrupt is generated, the count value in the Timer register is reset to 0x0000_0001, and counting resumes. If no Capture event occurs, the timer counts up to the
32-bit Compare value stored in the Timer Compare register,
. Upon reaching the Compare value, the timer generates an interrupt, the count
value in the Timer register is reset to 0x0000_0001, and counting resumes. The steps for configuring a timer for Capture/Compare mode and initiating the count are
as follows:
1. Write the following to the
register:
• Disable the timer,
= “0”
• Select 32-bit timer mode,
= "0"
• Configure the timer for Capture/Compare mode,
= “111”
• Set the prescale value,
• Set the Timer Input Capture edge
–
Rising edge:
= “0”
–
Falling edge:
= “1”
Rev.1.3 April 2015
Maxim Integrated
Page 595
