MAX32600 User’s Guide
CRC16 and CRC32 Hardware Accelerator
12.3 CRC Operation
12
CRC16 and CRC32 Hardware Accelerator
12.1
Overview
The Cyclic Redundancy Check (CRC) hardware peripheral, incorporated into the
MAX32600
, provides a fast method for calculating 16-bit and 32-bit CRC calculations
on 32-bit data values. The CRC peripheral is accessible from the Cortex-M3 processor or via the
Peripheral Management Unit (PMU)
. Both the CRC-16-CCITT and
CRC-32 calculations complete in a single clock cycle and use the following polynomials in the calculations.
CRC-16-CCITT:
CRC
16
=
X
16
+
X
12
+
X
5
+
1
CRC-32:
CRC
32
=
X
32
+
X
26
+
X
23
+
X
22
+
X
16
+
X
12
+
X
11
+
X
10
+
X
8
+
X
7
+
X
5
+
X
4
+
X
2
+
X
1
+
1
12.2
CRC Clock Gating
The CRC hardware peripheral uses the System Core Clock to operate and all CRC calculations complete in a single system clock cycle. The peripheral clock and
clock gate are enabled by default for the CRC peripheral. The register field
CLKMAN_CLK_GATE_CTRL2.crc_clk_gater
is used to control the peripheral clock and
clock gating for the CRC module. The table below shows the modes supported for the CRC peripheral clock.
crc_clk_gater (xxb)
Clock State
00b
Peripheral clock disabled. Lowest power mode when peripheral not in use.
01b
Default
: Peripheral clock enabled with Dynamic Clock Gating. Clock is active only when using the peripheral.
1xb
Peripheral clock is enabled and active at all times. Highest performance and highest current option.
12.3
CRC Operation
The
MAX32600
CRC hardware peripheral calculates a 16-bit or 32-bit CRC value based on a 32-bit data value combined with an initial seed value (default is 0xFFFF
for 16-bit CRC and 0xFFFFFFFF for 32-bit CRC calculations). For data values that are not 32-bits wide, the upper bytes must be padded with zeroes to the next 32-bit
boundary. Data may be written to
or
in byte, word, or double word format from either the Cortex-M3 processor or
PMU. A user specified initial seed value can be used by writing to the appropriate register (
or
) in the
MAX32600
hardware peripheral
along with setting the appropriate reseed enable bit (
or
Rev.1.3 April 2015
Maxim Integrated
Page 631