Intel 80C186EA, User Manual

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TIMER/COUNTER UNIT
9-6
When configured for internal clocking, the Timer/Counter Unit uses the input pins either to en-
able timer counting or to retrigger the associated timer. Externally, a timer increments on low-to-
high transitions on its input pin (up to ¼ CLKOUT frequency).
Timers 0 and 1 each have a single output pin. Timer output can be either a single pulse, indicating
the end of a timing cycle, or a variable duty cycle wave. These two output options correspond to
single maximum count mode and dual maximum count mode, respectively (Figure 9-4). Inter-
rupts can be generated at the end of every timing cycle.
Timer 2 has no input or output pins and can be operated only in single maximum count mode
(Figure 9-4). It can be used as a free-running clock and as a prescaler to Timers 0 and 1. Timer 2
can be clocked only internally, at ¼ CLKOUT frequency. Timer 2 can also generate interrupts at
the end of every timing cycle.
Figure 9-4. Timer/Counter Unit Output Modes
9.2 PROGRAMMING THE TIMER/COUNTER UNIT
Each timer has three registers: a Timer Control register (Figure 9-5 and Figure 9-6), a Timer
Count register (Figure 9-7) and a Timer Maxcount Compare register (Figure 9-8). Timers 0 and
1 also have access to an additional Maxcount Compare register. The Timer Control register con-
trols timer operation. The Timer Count register holds the current timer count value, and the Max-
count Compare register holds the maximum timer count value.
Dual Maximum
Count Mode
Single Maximum
Count Mode
One CPU
Clock
Maxcount B Maxcount A
Maxcount A
A1296-0A