4-5
PERIPHERAL CONTROL BLOCK
4.4.3 F-Bus Operation
The F-Bus functions differently than the external data bus for byte and word accesses. All write
transfers on the F-Bus occur as words, regardless of how they are encoded. For example, the in-
struction OUT DX, AL (DX is even) will write the entire AX register to the Peripheral Control
Block register at location [DX]. If DX were an odd location, AL would be placed in [DX] and
AH would be placed at [DX–1]. A word operation to an odd address would write [DX] and [DX–
1] with AL and AH, respectively. This differs from normal external bus operation where un-
aligned word writes modify [DX] and [DX+1]. In summary, do not use odd-aligned byte or word
writes to the PCB.
Aligned word reads work normally. Unaligned word reads work differently. For example, IN AX,
DX (DX is odd) will transfer [DX] into AL and [DX–1] into AH. Byte reads from even or odd
addresses work normally, but only a byte will be read. For example, IN AL, DX will not transfer
[DX] into AX (only AL is modified).
No problems will arise if the following recommendations are adhered to.
Word reads Aligned word reads of the PCB work normally. Access only even-
aligned words with IN AX, DX or MOV word register, even PCB
address.
Byte reads Byte reads of the PCB work normally. Beware of reading word-wide
PCB registers that may change value between successive reads (e.g.,
timer count value).
Word writes Always write even-aligned words to the PCB. Writing an odd-
aligned word will give unexpected results.
For the 80C186 Modular Core, use either
– OUT DX, AX or
– OUT DX, AL or
– MOV even PCB address, word register.
For the 80C188 Modular Core, using OUT DX, AX will perform an
unnecessary bus cycle and is not recommended. Use either
– OUT DX, AL or
– MOV even-aligned byte PCB address, byte register low byte.
Byte writes Always use even-aligned byte writes to the PCB. Even-aligned byte
writes will modify the entire word PCB location. Do not perform
unaligned byte writes to the PCB.
Summary of Contents for 80C186EA
Page 1: ...80C186EA 80C188EA Microprocessor User s Manual...
Page 2: ...80C186EA 80C188EA Microprocessor User s Manual 1995...
Page 19: ......
Page 20: ...1 Introduction...
Page 21: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 129: ......
Page 130: ...4 Peripheral Control Block...
Page 131: ......
Page 139: ......
Page 140: ...5 ClockGenerationand Power Management...
Page 141: ......
Page 165: ......
Page 166: ...6 Chip Select Unit...
Page 167: ......
Page 190: ...7 Refresh Control Unit...
Page 191: ......
Page 205: ......
Page 206: ...8 Interrupt Control Unit...
Page 207: ......
Page 239: ...INTERRUPT CONTROL UNIT 8 32...
Page 240: ...9 Timer Counter Unit...
Page 241: ......
Page 265: ......
Page 266: ...10 Direct Memory Access Unit...
Page 267: ......
Page 295: ...DIRECT MEMORY ACCESS UNIT 10 28...
Page 296: ...11 Math Coprocessing...
Page 297: ......
Page 314: ...12 ONCE Mode...
Page 315: ......
Page 318: ...A 80C186 Instruction Set Additions and Extensions...
Page 319: ......
Page 330: ...B Input Synchronization...
Page 331: ......
Page 334: ...C Instruction Set Descriptions...
Page 335: ......
Page 383: ...INSTRUCTION SET DESCRIPTIONS C 48...
Page 384: ...D Instruction Set Opcodes and Clock Cycles...
Page 385: ......
Page 408: ...Index...
Page 409: ......