CLOCK GENERATION AND POWER MANAGEMENT
5-16
Example 5-1. Initializing the Power Management Unit for Idle or Powerdown Mode
5.2.2 Powerdown Mode
Powerdown mode freezes the clock to the entire device (core and peripherals) and disables the
crystal oscillator. All internal devices (registers, state machines, etc.) maintain their states as long
as V
CC
is applied. The BIU will not honor DMA, DRAM refresh and HOLD requests in Power-
down mode because the clocks for those functions are off. CLKOUT freezes in a logic high state.
Current consumption in Powerdown mode consists of just transistor leakage (typically less than
100 microamps).
$mod186
name
example_80C186_power_management_code
;FUNCTION:
This function reduces CPU power consumption.
; SYNTAX:
extern void far power_mgt(int mode);
; INPUTS:
mode - 00 -> Active Mode
;
01 -> Powerdown Mode
;
02 -> Idle Mode
;
03 -> Active Mode
; OUTPUTS:
None
; NOTE:
Parameters are passed on the stack as required
;
by high-level languages
PWRCON equ xxxxH ;substitute PWRCON register
;offset
lib_80C186
segment public 'code'
assume cs:lib_80C186
public _power_mgt
_power_mgt
proc far
push bp ;save caller's bp
mov bp, sp ;get current top of stack
push ax ;save registers that will
push dx ;be modified
_mode
equ word ptr[bp+6] ;get parameter off the
;stack
mov dx, PWRCON ;select Power Control Reg
mov ax, _mode ;get mode
and ax, 3 ;mask off unwanted bits
out dx, ax
hlt ;enter mode
pop dx ;restore saved registers
pop ax
pop bp ;restore caller's bp
ret
_power_mgt
endp
lib_80C186
ends
end
Summary of Contents for 80C186EA
Page 1: ...80C186EA 80C188EA Microprocessor User s Manual...
Page 2: ...80C186EA 80C188EA Microprocessor User s Manual 1995...
Page 19: ......
Page 20: ...1 Introduction...
Page 21: ......
Page 28: ...2 Overview of the 80C186 Family Architecture...
Page 29: ......
Page 79: ......
Page 80: ...3 Bus Interface Unit...
Page 81: ......
Page 129: ......
Page 130: ...4 Peripheral Control Block...
Page 131: ......
Page 139: ......
Page 140: ...5 ClockGenerationand Power Management...
Page 141: ......
Page 165: ......
Page 166: ...6 Chip Select Unit...
Page 167: ......
Page 190: ...7 Refresh Control Unit...
Page 191: ......
Page 205: ......
Page 206: ...8 Interrupt Control Unit...
Page 207: ......
Page 239: ...INTERRUPT CONTROL UNIT 8 32...
Page 240: ...9 Timer Counter Unit...
Page 241: ......
Page 265: ......
Page 266: ...10 Direct Memory Access Unit...
Page 267: ......
Page 295: ...DIRECT MEMORY ACCESS UNIT 10 28...
Page 296: ...11 Math Coprocessing...
Page 297: ......
Page 314: ...12 ONCE Mode...
Page 315: ......
Page 318: ...A 80C186 Instruction Set Additions and Extensions...
Page 319: ......
Page 330: ...B Input Synchronization...
Page 331: ......
Page 334: ...C Instruction Set Descriptions...
Page 335: ......
Page 383: ...INSTRUCTION SET DESCRIPTIONS C 48...
Page 384: ...D Instruction Set Opcodes and Clock Cycles...
Page 385: ......
Page 408: ...Index...
Page 409: ......