Intel 80C186EA, User Manual

Page: 132 / 417

4-1
CHAPTER 4
PERIPHERAL CONTROL BLOCK
All integrated peripherals in the 80C186 Modular Core family are controlled by sets of registers
within an integrated Peripheral Control Block (PCB). The peripheral control registers are physi-
cally located in the peripheral devices they control, but they are addressed as a single block of
registers. The Peripheral Control Block encompasses 256 contiguous bytes and can be located on
any 256-byte boundary of memory or I/O space. The PCB Relocation Register, which is also lo-
cated within the Peripheral Control Block, controls the location of the PCB.
4.1 PERIPHERAL CONTROL REGISTERS
Each of the integrated peripherals’ control and status registers is located at a fixed offset above
the programmed base location of the Peripheral Control Block (see Table 4-1). These registers
are described in the chapters that cover the associated peripheral. “Accessing the Peripheral Con-
trol Block” on page 4-4 discusses how the registers are accessed and outlines considerations for
reading and writing them.
4.2 PCB RELOCATION REGISTER
In addition to control registers for the integrated peripherals, the Peripheral Control Block con-
tains the PCB Relocation Register (Figure 4-1). The Relocation Register is located at a fixed off-
set within the Peripheral Control Block (Table 4-1). If the Peripheral Control Block is moved, the
Relocation Register also moves.
The PCB Relocation Register allows the Peripheral Control Block to be relocated to any 256-byte
boundary within memory or I/O space. The Memory I/O bit (MEM) selects either memory space
or I/O space, and the R19:8 bits specify the starting (base) address of the PCB. The remaining bit,
Escape Trap (ET), controls access to the math coprocessor interface.
“Setting the PCB Base Location” on page 4-6 describes how to set the base location and outlines
some restrictions on the Peripheral Control Block location.