Intel 80C186EA, User Manual

Page: 118 / 417

3-37
BUS INTERFACE UNIT
Figure 3-32. Buffered AD Bus System
In a fully buffered system, DEN directly drives the transceiver output enable. A partially buffered
system requires that DEN be qualified with another signal to prevent the transceiver from going
active for local bus accesses. Figure 3-33 illustrates how to use chip-selects to qualify DEN.
DT/R always connects directly to the transceiver. However, an inverter may be required if the po-
larity of DT/R does not match the transceiver. DT/R goes low (0) only for memory and I/O read,
instruction prefetch and interrupt acknowledge bus cycles.
Latch
Processor
Data Bus
Address
Data
CS
CPU Local Bus Buffered Bus
ALE
Memory
or
I/O
Device
A19:16
AD15:0
Address Bus
DT/ R
DEN
Transceiver
A1095-0A