Section 31 Electrical Characteristics
Rev.1.00 Dec. 13, 2005 Page 1207 of 1286
REJ09B0158-0100
31.3.16 FLCTL Module Signal Timing
Table 31.20 FLCTL Module Signal Timing
(V
DDQ
= 3.0 to 3.6V, V
DD
= 1.25V, T
a
=
−
20 to 75
°
C/
−
40 to 85
°
C, C
L
= 30pF, No wait)
Item Symbol
Min.
Max.
Unit
Figure
Command output setup time t
NCDS
2
×
t
Fcyc
−
10
ns
Command output hold time
t
NCHD
1.5
×
t
Fcyc
−
5
ns
31.57
Data output setup time
t
NDOS
0.5
×
t
Fcyc
−
5
ns
Data output hold time
t
NDOH
0.5
×
t
Fcyc
−
10
ns
31.57, 31.58
31.60
Command to address
transition time 1
t
NCDAD1
1.5
×
t
Fcyc
−
10
ns
31.57,
31.58
Command to address
transition time 2
t
NCDAD2
2
×
t
Fcyc
−
10
ns
31.58
FWE
cycle time
t
NWC
t
Fcyc
−
5
ns
31.58,
31.60
FWE
low pulse width
t
NWP
0.5
×
t
Fcyc
−
5
ns
31.57,
31.58,
31.60, 31.61
FWE
high pulse width
t
NWH
0.5
×
t
Fcyc
−
5
ns
31.58,
31.60
Address to ready/busy
transition time
t
NADRB
32
×
t
Pcyc
ns 31.58,
31.59
Ready/busy to data read
transition time 1
t
NRBDR1
1.5
×
t
Fcyc
ns
Ready/busy to data read
transition time 2
t
NRBDR2
32
×
t
Pcyc
ns
FRE
cycle time
t
NSCC
t
Fcyc
−
5
ns
31.59
FRE
low pulse width
t
NSP
0.5
×
t
Fcyc
−
5
ns
31.59,
31.61
FRE
high pulse width
t
NSPH
0.5
×
t
Fcyc
−
5
ns
31.59
Read data setup time
t
NRDS
24
ns
Read data hold time
t
NRDH
5
ns
31.59, 31.61
Data write setup time
t
NDWS
32
×
t
Pcyc
ns
31.59
Содержание SH7780 Series
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Страница 122: ...Section 3 Instruction Set Rev 1 00 Dec 13 2005 Page 72 of 1286 REJ09B0158 0100 ...
Страница 146: ...Section 4 Pipelining Rev 1 00 Dec 13 2005 Page 96 of 1286 REJ09B0158 0100 ...
Страница 196: ...Section 6 Floating Point Unit FPU Rev 1 00 Dec 13 2005 Page 146 of 1286 REJ09B0158 0100 ...
Страница 292: ...Section 9 L Memory Rev 1 00 Dec 13 2005 Page 242 of 1286 REJ09B0158 0100 ...
Страница 450: ...Section 11 Local Bus State Controller LBSC Rev 1 00 Dec 13 2005 Page 400 of 1286 REJ09B0158 0100 ...
Страница 492: ...Section 12 DDR SDRAM Interface DDRIF Rev 1 00 Dec 13 2005 Page 442 of 1286 REJ09B0158 0100 ...
Страница 674: ...Section 15 Clock Pulse Generator CPG Rev 1 00 Dec 13 2005 Page 624 of 1286 REJ09B0158 0100 ...
Страница 692: ...Section 16 Watchdog Timer and Reset Rev 1 00 Dec 13 2005 Page 642 of 1286 REJ09B0158 0100 ...
Страница 726: ...Section 18 Timer Unit TMU Rev 1 00 Dec 13 2005 Page 676 of 1286 REJ09B0158 0100 ...
Страница 1004: ...Section 24 Multimedia Card Interface MMCIF Rev 1 00 Dec 13 2005 Page 954 of 1286 REJ09B0158 0100 ...
Страница 1032: ...Section 25 Audio Codec Interface HAC Rev 1 00 Dec 13 2005 Page 982 of 1286 REJ09B0158 0100 ...
Страница 1070: ...Section 26 Serial Sound Interface SSI Module Rev 1 00 Dec 13 2005 Page 1020 of 1286 REJ09B0158 0100 ...
Страница 1104: ...Section 27 NAND Flash Memory Controller FLCTL Rev 1 00 Dec 13 2005 Page 1054 of 1286 REJ09B0158 0100 ...
Страница 1150: ...Section 28 General Purpose I O GPIO Rev 1 00 Dec 13 2005 Page 1100 of 1286 REJ09B0158 0100 ...
Страница 1184: ...Section 29 User Break Controller UBC Rev 1 00 Dec 13 2005 Page 1134 of 1286 REJ09B0158 0100 ...
Страница 1266: ...Section 31 Electrical Characteristics Rev 1 00 Dec 13 2005 Page 1216 of 1286 REJ09B0158 0100 ...
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