Section 18 Timer Unit (TMU)
Rev.1.00 Dec. 13, 2005 Page 672 of 1286
REJ09B0158-0100
•
Operating on external clock
In channels 0, 1, and 2, the external clock pin (TCLK) input can be selected as the timer clock
by means of the TPSC2 to TPSC0 bits in TCR. The detected edge (rising, falling, or both
edges) can be selected with the CKEG1 and CKEG0 bits in TCR.
Figure 18.5 shows the timing for both-edge detection.
External clock
input pin
Pck
TCNT
N + 1
N
N – 1
Figure 18.5 Count Timing when Operating on External Clock
•
Operating on on-chip RTC output clock
The on-chip RTC output clock can be selected as the timer clock by means of the TPSC2 to
TPSC0 bits in TCR.
Figure 18.6 shows the timing for both-edge detection.
RTC output clock
TCNT
N
N + 1
N - 1
Figure 18.6 Count Timing when Operating on on-chip RTC output Clock
Содержание SH7780 Series
Страница 2: ...Rev 1 00 Dec 13 2005 Page ii of l ...
Страница 28: ...Rev 1 00 Dec 13 2005 Page xxviii of l ...
Страница 50: ...Rev 1 00 Dec 13 2005 Page l of l ...
Страница 82: ...Section 1 Overview Rev 1 00 Dec 13 2005 Page 32 of 1286 REJ09B0158 0100 ...
Страница 122: ...Section 3 Instruction Set Rev 1 00 Dec 13 2005 Page 72 of 1286 REJ09B0158 0100 ...
Страница 146: ...Section 4 Pipelining Rev 1 00 Dec 13 2005 Page 96 of 1286 REJ09B0158 0100 ...
Страница 196: ...Section 6 Floating Point Unit FPU Rev 1 00 Dec 13 2005 Page 146 of 1286 REJ09B0158 0100 ...
Страница 292: ...Section 9 L Memory Rev 1 00 Dec 13 2005 Page 242 of 1286 REJ09B0158 0100 ...
Страница 450: ...Section 11 Local Bus State Controller LBSC Rev 1 00 Dec 13 2005 Page 400 of 1286 REJ09B0158 0100 ...
Страница 492: ...Section 12 DDR SDRAM Interface DDRIF Rev 1 00 Dec 13 2005 Page 442 of 1286 REJ09B0158 0100 ...
Страница 674: ...Section 15 Clock Pulse Generator CPG Rev 1 00 Dec 13 2005 Page 624 of 1286 REJ09B0158 0100 ...
Страница 692: ...Section 16 Watchdog Timer and Reset Rev 1 00 Dec 13 2005 Page 642 of 1286 REJ09B0158 0100 ...
Страница 726: ...Section 18 Timer Unit TMU Rev 1 00 Dec 13 2005 Page 676 of 1286 REJ09B0158 0100 ...
Страница 1004: ...Section 24 Multimedia Card Interface MMCIF Rev 1 00 Dec 13 2005 Page 954 of 1286 REJ09B0158 0100 ...
Страница 1032: ...Section 25 Audio Codec Interface HAC Rev 1 00 Dec 13 2005 Page 982 of 1286 REJ09B0158 0100 ...
Страница 1070: ...Section 26 Serial Sound Interface SSI Module Rev 1 00 Dec 13 2005 Page 1020 of 1286 REJ09B0158 0100 ...
Страница 1104: ...Section 27 NAND Flash Memory Controller FLCTL Rev 1 00 Dec 13 2005 Page 1054 of 1286 REJ09B0158 0100 ...
Страница 1150: ...Section 28 General Purpose I O GPIO Rev 1 00 Dec 13 2005 Page 1100 of 1286 REJ09B0158 0100 ...
Страница 1184: ...Section 29 User Break Controller UBC Rev 1 00 Dec 13 2005 Page 1134 of 1286 REJ09B0158 0100 ...
Страница 1266: ...Section 31 Electrical Characteristics Rev 1 00 Dec 13 2005 Page 1216 of 1286 REJ09B0158 0100 ...
Страница 1328: ...Appendix Rev 1 00 Dec 13 2005 Page 1278 of 1286 REJ09B0158 0100 ...
Страница 1336: ...Rev 1 00 Dec 13 2005 Page 1286 of 1286 REJ09B0158 0100 ...
Страница 1339: ......
Страница 1340: ...SH7780 Hardware Manual ...