Serial bus analysis
R&S
®
RTA4000
269
User Manual 1335.7898.02 ─ 08
13.3.1
The I²C protocol
This chapter provides an overview of protocol characteristics, data format, address
types and trigger possibilities. For detailed information, read the "I2C-bus specification
and user manual" available on the NXP manuals webpage at
.
I²C characteristics
Main characteristics of I²C are:
●
Two-wire design: serial clock (SCL) and serial data (SDA) lines
●
Master-slave communication: the master generates the clock and addresses the
slaves. Slaves receive the address and the clock. Both master and slaves can
transmit and receive data.
●
Addressing scheme: each slave device is addressable by a unique address. Multi-
ple slave devices can be linked together and can be addressed by the same mas-
ter.
●
Read/write bit: specifies if the master reads (=1) or writes (=0) the data.
●
Acknowledge: takes place after every byte. The receiver of the address or data
sends the acknowledge bit to the transmitter.
The R&S
RTA4000 supports all operating speed modes: high-speed, fast mode plus,
fast mode, and standard mode.
Data transfer
The format of a simple I²C message (frame) with 7-bit addressing consists of the fol-
lowing parts:
●
Start condition: a falling slope on SDA while SCL is high
●
7-bit address of the slave device that either is written to or read from
●
R/W bit: specifies if the data is written to or read from the slave
●
ACKnowledge bits: is issued by the receiver of the previous byte if the transfer was
successful
Exception: At read access, the master terminates the data transmission with a
NACK bit after the last byte.
●
Data: several data bytes with an ACK bit after every byte
●
Stop condition: a rising slope on SDA while SCL is high
Figure 13-9: I2C writes access with 7-bit address
I²C (option R&S
RTA-K1)
