CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
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User’s Manual U14492EJ3V0UD
(4) Timer 2 sub-channel n sub capture/compare register (CVSEn0) (n = 1 to 4)
The CVSEn0 register is a sub-channel n 16-bit sub capture/compare register.
In the compare register mode, this register can be used as a buffer. In the capture register mode, this register
captures the value of TM20 when the BFEEn bit of the CMSEm0 register = 0 (m = 12, 34).
If the capture register mode is selected in the 32-bit mode (value of TB1En and TB0En bits of CMSEm0
register = 11B), this register captures the contents of TM20 (lower 16 bits).
The CVSEn0 register can be written only in the compare register mode. If this register is written in the capture
register mode, the contents written to CVSEn0 register will be lost.
This register can be read/written in 16-bit units.
Caution
When the BFEEn bit = 1, a compare match occurs on starting the timer in the compare
register mode because the values of both the TM2x and CVPEn0 registers are 0 after reset
(TM2x = timer/counter selected by TB1En and TB0En bits, n = 1 to 4). After that, the value
of the sub register (CVSEn0) is written to the main register (CVPEn0).
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CVSE10
Address
FFFFF650H
Initial value
0000H
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CVSE20
Address
FFFFF654H
Initial value
0000H
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CVSE30
Address
FFFFF658H
Initial value
0000H
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CVSE40
Address
FFFFF65CH
Initial value
0000H
(5) Timer 2 sub-channel 5 capture/compare register (CVSE50)
The CVSE50 register is a sub-channel 5 16-bit capture/compare register.
In the capture register mode, it captures the count value of TM21.
In the compare register mode, it detects match with TM21.
This register can be read/written in 16-bit units.
14
13
12
2
3
4
5
6
7
8
9
10
11
15
1
0
CVSE50
Address
FFFFF662H
Initial value
0000H
Содержание V850E/IA1 mPD703116
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