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User’s Manual U14492EJ3V0UD
LIST OF FIGURES (4/8)
Figure No.
Title
Page
9-71
Capture Operation: Mode with 16-Bit Buffer (When CMSEx0 Register’s TByE1 Bit = 0, TByE0 Bit = 1,
CCSEy Bit = 0, LNKEy Bit = 0, BFEEy Bit = 1, EEVEy Bit = 1, and CSCE0 Register’s SEVEy Bit = 0) .......367
9-72
Capture Operation: 32-Bit Cascade Operation Mode (When CMSEx Register’s TByE1 Bit = 1, TByE0
Bit = 1, CCSEy Bit = 0, LNKEy Bit = 0, BFEEy Bit = Arbitrary, EEVEy Bit = 1, and CSCE0 Register’s
SEVEy Bit = 0)..............................................................................................................................................368
9-73
Capture Operation: Capture Control by Software and Trigger Timing (When CMSEx0
Register’s TByE1 Bit = 0, TByE0 Bit = 1, CCSEy Bit = 0, LNKEy Bit = 0, BFEEy Bit = 1) ............................369
9-74
Compare Operation: Buffer-Less Mode (When CMSEx0 Register’s CCSEy Bit = 1,
LNKEy Bit = Arbitrary, BFEEy Bit = 0) ..........................................................................................................370
9-75
Compare Operation: Mode with Buffer (When Operation Is Delayed Through Setting of LNKEy
Bit of CMSEx0 Register, CMSEx0 Register’s CCSEy Bit = 1, BFEEy Bit = 1) .............................................371
9-76
Capture Operation: Timer 2 Count Value Read Timing (When CMSE050 Register’s CCSEy Bit = 0,
EEVEy Bit = 1, and CSCE0 Register’s SEVEy Bit = 0) ................................................................................372
9-77
Compare Operation: Timing of Compare Match and Write Operation to Register (When CMSE050
Register’s CCSEy Bit = 1, EEVEy Bit = Arbitrary, and CSCE0 Register’s SEVEy Bit = Arbitrary)................373
9-78
Signal Output Operation: Toggle Mode 0 and Toggle Mode 1 (When OCTLE0 Register’s
SWFEn Bit = 0, and ODELE0 Register’s ODLEn2 to ODLEn0 Bits = 0) ......................................................374
9-79
Signal Output Operation: Toggle Mode 2 and Toggle Mode 3 (When OCTLE0 Register’s
SWFEn Bit = 0, and ODELE0 Register’s ODLEn2 to ODLEn0 Bits = 0) ......................................................375
9-80
Signal Output Operation: During Software Control (When OCTLE0 Register’s OTMEn1,
OTMEn0 Bits = Arbitrary, SWFEn Bit = 1, and ODELE0 Register’s ODLEn2 to ODLEn0 Bits = 0)..............375
9-81
Signal Output Operation: During Delay Output Operation (When OCTLE0 Register’s OTMEn1,
OTMEn0 Bits = 0, ALVEn = 0, SWFEn Bit = 0) ............................................................................................376
9-82
Block Diagram of Timer 3 .............................................................................................................................378
9-83
Timer 3 (TM3)...............................................................................................................................................379
9-84
Basic Operation of Timer 3 ...........................................................................................................................389
9-85
Operation After Overflow (When OST = 1) ...................................................................................................390
9-86
Capture Operation Example .........................................................................................................................391
9-87
TM3 Capture Operation Example (When Both Edges Are Specified)...........................................................392
9-88
Compare Operation Example ......................................................................................................................393
9-89
TM3 Compare Operation Example (Set/Reset Output Mode) ......................................................................395
9-90
Contents of Register Settings When Timer 3 Is Used as Interval Timer.......................................................396
9-91
Interval Timer Operation Timing Example ....................................................................................................397
9-92
Contents of Register Settings When Timer 3 Is Used for PWM Output........................................................398
9-93
PWM Output Operation Timing Example......................................................................................................399
9-94
Contents of Register Settings When Timer 3 Is Used for Cycle Measurement ............................................400
9-95
Cycle Measurement Operation Timing Example ..........................................................................................401
9-96
Block Diagram of Timer 4 .............................................................................................................................404
9-97
Example of Timing During TM4 Operation ...................................................................................................407
9-98
TM4 Compare Operation Example ..............................................................................................................409
9-99
Block Diagram of Timer Connection Function ..............................................................................................412
10-1
Asynchronous Serial Interface 0 Block Diagram...........................................................................................417
10-2
Asynchronous Serial Interface Transmit/Receive Data Format ....................................................................426
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