NEC V850E/IA1 mPD703116, Руководство пользователя

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CHAPTER 3 CPU FUNCTION
87
User’s Manual U14492EJ3V0UD
(7/11)
Bit Units for Manipulation Address Function Register Name Symbol R/W
1 Bit 8 Bits 16 Bits
Initial Value
FFFFF5EFH Status register 0 STATUS0 R
√ √
00H
FFFFF5F6H CC101 capture input selection register CSL10 R/W
√ √
00H
FFFFF5F8H Timer 10 noise elimination time selection register NRC10 R/W
√ √
00H
FFFFF600H Timer 11 TM11 R/W
√
0000H
FFFFF602H Compare register 110 CM110 R/W
√
0000H
FFFFF604H Compare register 111 CM111 R/W
√
0000H
FFFFF606H Capture/compare register 110 CC110 R/W
√
0000H
FFFFF608H Capture/compare register 111 CC111 R/W
√
0000H
FFFFF60AH Capture/compare control register 1 CCR1 R/W
√ √
00H
FFFFF60BH Timer unit mode register 1 TUM1 R/W
√ √
00H
FFFFF60CH Timer control register 11 TMC11 R/W
√ √
00H
FFFFF60DH Signal edge selection register 11 SESA11 R/W
√ √
00H
FFFFF60EH Prescaler mode register 11 PRM11 R/W
√ √
07H
FFFFF60FH Status register 1 STATUS1 R
√ √
00H
FFFFF616H CC111 capture input selection register CSL11 R/W
√ √
00H
FFFFF618H Timer 11 noise elimination time selection register NRC11 R/W
√ √
00H
FFFFF620H Timer connection selection register 0 TMIC0 R/W
√ √
00H
FFFFF630H Timer 2 input filter mode register 0 FEM0 R/W
√ √
00H
FFFFF631H Timer 2 input filter mode register 1 FEM1 R/W
√ √
00H
FFFFF632H Timer 2 input filter mode register 2 FEM2 R/W
√ √
00H
FFFFF633H Timer 2 input filter mode register 3 FEM3 R/W
√ √
00H
FFFFF634H Timer 2 input filter mode register 4 FEM4 R/W
√ √
00H
FFFFF635H Timer 2 input filter mode register 5 FEM5 R/W
√ √
00H
FFFFF640H Timer 2 clock stop register 0 STOPTE0 R/W
√
0000H
FFFFF640H Timer 2 clock stop register 0L
STOPTE0L
R
√
00H
FFFFF641H Timer 2 clock stop register 0H
STOPTE0H
R/W
√ √
00H
FFFFF642H Timer 2 count clock/control edge selection
register 0
CSE0 R/W
√
0000H
FFFFF642H Timer 2 count clock/control edge selection
register 0L
CSE0L R/W
√ √
00H
FFFFF643H Timer 2 count clock/control edge selection
register 0H
CSE0H R/W
√ √
00H
FFFFF644H Timer 2 sub-channel input event edge
selection register 0
SESE0 R/W
√
0000H
FFFFF644H Timer 2 sub-channel input event edge
selection register 0L
SESE0L R/W
√ √
00H
FFFFF645H Timer 2 sub-channel input event edge
selection register 0H
SESE0H R/W
√ √
00H