1-6 Technical Information
Chipset
The Image P90E and Image P100E computers use the Intel Neptune II chipset, which
consists of the PCI cache and memory controller (PCMC), two local bus accelerators
(LBXs), the PCI EISA bridge component (PCEB), and the EISA system component (ESC).
Together these five chips control the cache memory, the EISA bus, the BIOS Flash ROM,
the keyboard controller, and the I/O controller. The chipset also contains several I/O ports
that control many aspects of the computer’s hardware operation.
PCI Cache and Memory Controller (PCMC)
The PCMC provides cache control, system memory control, and PCI bus control. An
integrated cache controller supports 256 KB of synchronous SRAM. The PCMC supports
up to 256 MBs of cacheable system memory. The PCI controller enhances system memory
performance by allowing for concurrency between the CPU bus and the PCI bus. For
further details, refer to the
Intel Neptune II PCMC and LBX Component Specification
.
Local Bus Accelerators (LBXs)
Two LBXs are used to interface the Host bus to the PCI bus and the system memory data
bus. The LBXs provide the following five buffers to increase performance.
n
CPU to memory posted write buffer
n
PCI to memory posted write buffer
n
Memory to PCI read buffer
n
CPU to PCI posted write buffer
n
CPU to PCI read prefetch buffer
For further details, refer to the
Intel Neptune II PCMC and LBX Component Specification
.
