
Technical Information 1-13
Real-Time Clock (RTC)
The computer uses a Benchmarq bq4287 RTC module with non-volatile RAM control. The
bq4287 resides on the XD bus and provides a time-of-day clock and a 100-year calendar
with alarm features and battery operation. The battery life is approximately 6 years when
driving an SRAM that draws 2 microamperes when off and the computer is off 2/3 of the
day. For further information, refer to the
Benchmarq bq4287
data sheet.
System I/O Controller
The computer uses the SMC FDC37C665 I/O system I/O controller to provide a floppy
disk controller, a digital data separator, two 16550 compatible UARTS, and an enhanced
bidirectional parallel port. The computer supports extended capabilities port (ECP),
enhanced parallel port (EPP), and ZIPPY protocols.
The I/O controller provides control for up to two diskette/tape drives. The following
devices are supported:
n
5 1/4-inch 360 KB diskette drive
n
5 1/4-inch 1.2 MB diskette drive
n
3 1/2-inch, 720 KB diskette drive
n
3 1/2-inch, 1.44 MB diskette drive
n
3 1/2-inch 2.88 MB diskette drive
The capacity of 3 1/2 inch diskette drives is sensed automatically. The existence of an
EISA floppy controller is also automatically sensed. If the BIOS detects an EISA floppy
controller, the on-board floppy controller is disabled. The on-board floppy controller can
also be disabled via Setup (for diskless workstations). However, if there is no bootable
device available, the system BIOS will attempt to boot from the built-in floppy even if the
on-board floppy controller is disabled via Setup. This provides a bootable system in the
event that the CMOS is corrupted.
I/O Mapping
The processor communicates with I/O devices by I/O mapping. There are a large number of
I/O ports implemented in the system associated with the keyboard controller, system I/O
controller, and Neptune II chipset. The hexadecimal (hex) addresses of I/O devices used by
the Image P90E and Image P100E are listed in Table Section 1-4. For a description of the
chipset configuration registers, see the following subsection.
The I/O ports implemented by the system I/O controller are not listed. Refer to the
SMC
FDC37C665
data sheets for a detailed description of the system I/O controller ports. In
addition, keyboard controller registers (with the exception of the keyboard status register)
are documented in the
NEC PS/2 Style Keyboard Controller
release notes.