1-22 Technical Information
Interrupt Controller
The interrupt controller is implemented on the EISA system component (ESC) and
operates as an interrupt manager for the entire system environment. The controller accepts
requests from peripherals, issues interrupt requests to the processor, resolves interrupt
priorities, and provides vectors for the processor to determine which interrupt routine to
execute. The interrupt controller has priority assignment modes that can be reconfigured at
any time during system operations.
The interrupt levels are listed in Table Section 1-5. Interrupt-level assignments 0 through
15 are in order of decreasing priority. See Section 2, Setup and Configuration, for
information on changing the interrupts using Setup.
Table Section 1-5 Interrupt Level Assignments
Interrupt Priority
Interrupt Device
IRQ00
Counter/Timer
IRQ01
Keyboard
IRQ02
Cascade (INT output from slave)
IRQ03
COM2*
IRQ04
COM1*
IRQ05
LPT2*
IRQ06
Diskette Drive Controller*
IRQ07
Parallel Port 1*
IRQ08
Real-time clock
IRQ09
Available
IRQ10
Available
IRQ11
Available
IRQ12
PS/2 mouse*
IRQ13
Coprocessor
IRQ14
Primary IDE
IRQ15
Secondary IDE
*Industry standard locations