
Section 7: TSP command reference
2606B System SourceMeter® Instrument Reference Manual
7-310
2606B-901-01 Rev. B / May 2018
status.questionable.instrument.smuX.*
This attribute contains the questionable status SMU X summary register set.
Type
TSP-Link accessible
Affected by
Where saved
Default value
Attribute
- -
- -
- -
- -
.condition (R)
Yes
Not applicable
Not saved
Not applicable
.enable (RW)
Yes
Status reset
Not saved
0
.event (R)
Yes
Status reset
Not saved
0
.ntr (RW)
Yes
Status reset
Not saved
0
.ptr (RW)
Yes
Status reset
Not saved
4864 (All bits set)
Usage
questionableRegister
= status.questionable.instrument.smu
X
.condition
questionableRegister
= status.questionable.instrument.smu
X
.enable
questionableRegister
= status.questionable.instrument.smu
X
.event
questionableRegister
= status.questionable.instrument.smu
X
.ntr
questionableRegister
= status.questionable.instrument.smu
X
.ptr
status.questionable.instrument.smu
X
.enable =
questionableRegister
status.questionable.instrument.smu
X
.ntr =
questionableRegister
status.questionable.instrument.smu
X
.ptr =
questionableRegister
questionableRegister
The status of the questionable status SMU X summary register; a zero (0)
indicates no bits set (also send 0 to clear all bits); other values indicate various
bit settings
X
Source-measure unit (SMU) channel (for example
status.questionable.instrument.smua.enable
applies to SMU
channel A)
Details
These attributes are used to read or write to the questionable status instrument SMU X summary
registers. Reading a status register returns a value. The binary equivalent of the returned value
indicates which register bits are set. The least significant bit of the binary number is bit B0, and the
most significant bit is bit B15. For example, if a value of
7.02
(which is 768) is read as the
value of the condition register, the binary equivalent is 0000 0011 0000 0000. This value indicates
that bit B8 and bit B9 are set.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
**
>
>
>
>
>
>
>
>
>
>
>
>
>
>
*
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
* Least significant bit
** Most significant bit
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
Enable and transition registers
(on page E-16). The individual bits of this
register are defined in the following table.