Jetter AG
251
JC-120MC
Programming
Network registers, network inputs and outputs
The network registers, network inputs and outputs let you access in
transparent mode, at cyclic data interchange, registers, inputs and outputs of
remote nodes. The controller accesses the local image of the cyclic data.
These are the prerequisites for using the registers, inputs and outputs at cyclic
data interchange:
Via publish/subscribe, the data are interchanged in cyclic mode.
Network registers, network inputs and outputs are not used in cyclic data
interchange:
If network registers of non-cyclic data interchange are accessed, the
controller generates acyclic network register access.
If network inputs and outputs of non-cyclic data interchange are accessed,
the controller does not generate acyclic network register access. There are
no data being transmitted via network.
Advantages of network registers, network inputs and outputs in cyclical data
interchange as compared with acyclic data interchange:
The operating system cyclically interchanges data of the registers, inputs
and outputs with other network nodes.
This results in network load optimization.
This is a very quick access, as, at the instance of use, only the local
images of the data have to be accessed.
The addressing scheme for network registers is as follows:
No.
Element
Description
1
Register number
Supports direct access
2
First part of register prefix:
Bus node ID, GNN
nnn = 001 ... 199: ID of the network node,
referred to as Global Node Number
3
Second part of register
prefix:
Number of the function
module
mm = 02 ... 17: Number of the JX3 module of a
remote node
mm = 91: Registers of the combined digital
inputs and outputs of a remote node
4
Part 1 + 2: Register prefix 1nnnmm: The prefix is preceded by a leading
ONE.
Introduction
Prerequisites
Properties
Advantages of network
registers, network inputs
and outputs
Register addressing
scheme
Содержание JC-120MC
Страница 1: ...User Manual JC 120MC Controller 60880901 We automate your success...
Страница 18: ......
Страница 40: ...40 Jetter AG 3 Identifying Hardware revisions see page 38 Related topics...
Страница 160: ......
Страница 186: ......
Страница 196: ......
Страница 395: ...Jetter AG 395 JC 120MC Programming Result When initializing the JX2 system bus the adjusted baud rate values were used...
Страница 485: ...Jetter AG 485 JC 120MC Programming Topic Page Programming 486 Registers 498 Contents...
Страница 521: ...Jetter AG 521 JC 120MC Programming Use 29 bit identifier Default 11 bit identifier...
Страница 586: ......
Страница 604: ......
Страница 633: ......