If the main oscillator provides the clock reference to the PLL, the translation provided by hardware
and used to program the PLL is available for software in the
PLL Frequency n (PLLFREQn)
registers
(see page 292). The internal translation provides a translation within ± 1% of the targeted PLL VCO
frequency. Table 5-7 on page 238 shows the actual PLL frequency and error for a given crystal
choice.
Table 5-7 on page 238 provides examples of the programming expected for the
PLLFREQ0
and
PLLFREQ1
registers. The first column specifies the input crystal frequency and the last column
displays the PLL frequency given the values of
MINT
and
N
, when
Q
=0.
Table 5-7. Actual PLL Frequency
a
PLL Frequency
(MHz)
Reference
Frequency
(MHz)
b
N
MINT (Hexadecimal
Value)
MINT (Decimal
Value)
Crystal
Frequency
(MHz)
320
5
0x0
0x40
64
5
320
2
0x2
0x35
160
6
320
8
0x0
0x28
40
8
320
10
0x0
0x20
32
10
320
4
0x2
0x50
80
12
320
16
0x0
0x14
20
16
320
2
0x8
0xA0
160
18
320
20
0x0
0x10
16
20
320
8
0x2
0x28
40
24
320
5
0x4
0x40
64
25
480
5
0x0
0x60
96
5
480
6
0x0
0x50
80
6
480
8
0x0
0x3C
60
8
480
10
0x0
0x30
48
10
480
12
0x0
0x28
40
12
480
16
0x0
0x1E
30
16
480
6
0x2
0x50
80
18
480
20
0x0
0x18
24
20
480
24
0x0
0x14
20
24
480
5
0x4
0x60
96
25
a. For all examples listed, Q=0
b. For a given crystal frequency, N should be chosen such that the reference frequency is within 4 to 30 MHz.
PLL Operation
If a PLL configuration is changed, the PLL output frequency is unstable until it reconverges (relocks)
to the new setting. The time between the configuration change and relock is T
READY
(see Table
27-16 on page 1835). During the relock time, the affected PLL is not usable as a clock reference.
Software can poll the
LOCK
bit in the
PLL Status (PLLSTAT)
register to determine when the PLL
has locked.
Modification of the PLL VCO frequency may not be performed while the PLL serves as a clock
source to the system. All changes to the PLL must be performed using a different clock source until
the PLL has locked frequency. Thus, changing the PLL VCO frequency must be done as a sequence
from PLL to PIOSC/MOSC and then PIOSC/MOSC to new PLL.
June 18, 2014
238
Texas Instruments-Production Data
System Control