Table 18-5. Write Field Decoding for I2CMCS[6:0] (continued)
Next State Description
I2CMCS[6:0]
I2CMSA[0]
Current
State
RUN
START
STOP
ACK
HS
QCCMD
BURST
R/S
RECEIVE operation with negative ACK
(master remains in Master Receive state).
1
0
0
0
0
0
0
X
Master
Receive
STOP condition (master goes to Idle state).
b
0
0
1
X
0
0
0
X
RECEIVE followed by STOP condition (master
goes to Idle state).
1
0
1
0
0
0
0
X
RECEIVE operation (master remains in Master
Receive state).
1
0
0
1
0
0
0
X
N FIFO-serviced RECEIVE operations with
negative ACK on the last RECEIVE (master
remains in Master Receive state).
0
0
0
0
0
0
1
X
N FIFO-serviced RECEIVE operations
followed by STOP condition (master goes to
Idle state).
0
0
1
0
0
0
1
X
N FIFO-serviced RECEIVE operations (master
remains in Master Receive state).
0
0
0
1
0
0
1
X
Illegal.
1
0
1
1
0
0
0
X
Illegal.
0
0
1
1
0
0
1
X
Repeated START condition followed by
RECEIVE operation with a negative ACK
(master remains in Master Receive state).
1
1
0
0
0
0
0
1
Repeated START condition followed by
RECEIVE and STOP condition (master goes
to Idle state).
1
1
1
0
0
0
0
1
Repeated START condition followed by
RECEIVE (master remains in Master Receive
state).
1
1
0
1
0
0
0
1
Repeated START condition followed by N
FIFO-serviced RECEIVE operations with a
negative ACK on the last RECEIVE (master
remains in Master Receive state).
0
1
0
0
0
0
1
1
Repeated START condition followed by N
FIFO-serviced RECEIVE operations and
STOP condition (master goes to Idle state).
0
1
1
0
0
0
1
1
Repeated START condition followed by N
FIFO-serviced RECEIVE operations (master
remains in Master Receive state).
0
1
0
1
0
0
1
1
Repeated START condition followed by
TRANSMIT (master goes to Master Transmit
state).
1
1
0
X
0
0
0
0
Repeated START condition followed by
TRANSMIT and STOP condition (master goes
to Idle state).
1
1
1
X
0
0
0
0
Repeated START condition followed by N
FIFO-serviced TRANSMIT operations (master
goes to Master Transmit state).
0
1
0
X
0
0
1
0
Repeated START condition followed by N
FIFO-serviced TRANSMIT operations and
STOP condition (master goes to Idle state).
0
1
1
X
0
0
1
0
NOP.
All other combinations not listed are non-operations.
a. An X in a table cell indicates the bit can be 0 or 1.
June 18, 2014
1310
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface
