NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.4 — 14 May 2018
314514
131 of 345
Table 160. TIMERS_TIMER3_TIMEOUT_REG (address offset 0x0028)
Bit
Symbol
Reset Value
Access Type
Description
31:0
TIMER3_TIMEOUT
0
R/W
Initial count value of Timer3 in step size of
0.30 ms
[2]
. If set to 0, this feature is disabled.
Table 161. TIMERS_TIMER3_COUNT_REG (address offset 0x002C)
Bit
Symbol
Reset Value
Access Type
Description
31:0
TIMER3_COUNT
0
R
Current count value of Timer3 in step size of
50 ns
Table 162. TIMERS_WDOG_CONTROL_REG (address offset 0x0030)
Bit
Symbol
Reset Value
Access Type
Description
31:1
RESERVED
0
R
reserved
0
WDOG_KICK
0
D
1: re-initialize the Watchdog Timer to value
WDOG_TIMEOUT
0: no effect
Table 163. TIMERS_WDOG_TIMEOUT_REG (address offset 0x0034)
Bit
Symbol
Reset Value
Access Type
Description
31:10
RESERVED
0
R
reserved
9:0
WDOG_TIMEOUT
0
R/W
Initial count value of Watchdog Timer in step
size of 21.5 ms
If set to 0, this feature is disabled.
Table 164. TIMERS_WDOG_TRIGGER_INT_REG (address offset 0x0038)
Bit
Symbol
Reset Value
Access Type
Description
31:10
RESERVED
0
R
reserved
9:0
WDOG_INT_THRESHOLD
0
R/W
Count value of Watchdog Timer which
triggers interrupt
intreq_wdog_o
Table 165. TIMERS_WDOG_COUNT_REG (address offset 0x003C)
Bit
Symbol
Reset Value
Access Type
Description
31:10
RESERVED
0
R
reserved
9:0
WDOG_COUNT
0
R
Current count value of Watchdog Timer in
step size of 21.5 ms
