NXP Semiconductors
UM10858
PN7462 family HW user manual
UM10858
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© NXP B.V. 2018. All rights reserved.
User manual
COMPANY PUBLIC
Rev. 1.4 — 14 May 2018
314514
297 of 345
HOSTIF_BUFFER_RX1_CFG_REG
This register is used to configure the RX buffer 1
Table 333. HOSTIF_BUFFER_RX1_CFG_REG (address offset 0x003C)
Bit
Symbol
Access Reset
Value
Description
31:29
RESERVED
R
0
Reserved
28
RX1_BUFFER_DISAB
LE [1]
R/W
0
1 - buffer is disabled
27:26
RX1_HEADER_OFFS
ET [1][5][6]
R/W
0x02
Number of padding bytes to add before
writing frame header to first word of RX
buffer 1.Not applicable to Native Mode.
25
RX1_SHORT_FRAME
_BUFFER [1][3][5]
R/W
0
1 - buffer assigned to short frames
0 - buffer assigned to non-short frames
Not applicable to Native Mode.
24:14
RX1_MAX_SIZE
[1][4][5]
R/W
0
Maximum size (bytes) of RX buffer 1
13:0
RX1_START_ADDR
[1][5]
R/W
0
Word start address of RX buffer 1. Bits
[1:0] are unused.
[1] Any change to this register, is only taken into account if the buffer is not in use
(RX1_BUFFER_LOCK = 0). However, the register itself is updated.
[3] The frame length of a short frame is defined in field SHORT_FRAME_LEN of
HOSTIF_CONTROL_REG
[4] Value must be greater than or equal to RX1_HEADER_ + largest payload
expected (rounded up to the next word).
[5] Attempting to change this field when the buffer is in use (RX1_BUFFER_LOCK = 1) will generate a
System Error.
[6] Only values 0,1 or 2 are permitted
HOSTIF_BUFFER_RX2_CFG_REG
This register is used to configure the RX buffer 2
Table 334. HOSTIF_BUFFER_RX2_CFG_REG (address offset 0x0040)
Bit
Symbol
Access Reset
Value
Description
31:29
RESERVED
R
0
Reserved
28
RX2_BUFFER_DISAB
LE [1]
R/W
0
1 - buffer is disabled
27:26
RX2_HEADER_OFFS
ET [1][5][6]
R/W
0x02
Number of padding bytes to add before
writing frame header to first word of RX
buffer 2. Not applicable to Native Mode.
25
RX2_SHORT_FRAME
_BUFFER [1][3][5]
R/W
0
1 - buffer assigned to short frames
0 - buffer assigned to non-short frames
Not applicable to Native Mode.
